NL8503250A - Bewakingsschakeling voor een niet-gecodeerde binaire bitstroom. - Google Patents

Bewakingsschakeling voor een niet-gecodeerde binaire bitstroom. Download PDF

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Publication number
NL8503250A
NL8503250A NL8503250A NL8503250A NL8503250A NL 8503250 A NL8503250 A NL 8503250A NL 8503250 A NL8503250 A NL 8503250A NL 8503250 A NL8503250 A NL 8503250A NL 8503250 A NL8503250 A NL 8503250A
Authority
NL
Netherlands
Prior art keywords
read
input
output
bit
memory
Prior art date
Application number
NL8503250A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL8503250A priority Critical patent/NL8503250A/nl
Priority to US06/926,476 priority patent/US4860293A/en
Priority to EP86202085A priority patent/EP0227145B1/en
Priority to DE8686202085T priority patent/DE3677355D1/de
Priority to JP61279925A priority patent/JPH0710063B2/ja
Publication of NL8503250A publication Critical patent/NL8503250A/nl

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/07Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Communication Control (AREA)
NL8503250A 1985-11-26 1985-11-26 Bewakingsschakeling voor een niet-gecodeerde binaire bitstroom. NL8503250A (nl)

Priority Applications (5)

Application Number Priority Date Filing Date Title
NL8503250A NL8503250A (nl) 1985-11-26 1985-11-26 Bewakingsschakeling voor een niet-gecodeerde binaire bitstroom.
US06/926,476 US4860293A (en) 1985-11-26 1986-11-03 Supervision circuit for a non-encoded binary bit stream
EP86202085A EP0227145B1 (en) 1985-11-26 1986-11-24 Supervision circuit for a non-encoded binary bit stream
DE8686202085T DE3677355D1 (de) 1985-11-26 1986-11-24 Ueberwachungsschaltung fuer einen nichtcodierten bitstrom.
JP61279925A JPH0710063B2 (ja) 1985-11-26 1986-11-26 非符号化2進ビツト流の監視回路

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8503250 1985-11-26
NL8503250A NL8503250A (nl) 1985-11-26 1985-11-26 Bewakingsschakeling voor een niet-gecodeerde binaire bitstroom.

Publications (1)

Publication Number Publication Date
NL8503250A true NL8503250A (nl) 1987-06-16

Family

ID=19846919

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8503250A NL8503250A (nl) 1985-11-26 1985-11-26 Bewakingsschakeling voor een niet-gecodeerde binaire bitstroom.

Country Status (5)

Country Link
US (1) US4860293A (ja)
EP (1) EP0227145B1 (ja)
JP (1) JPH0710063B2 (ja)
DE (1) DE3677355D1 (ja)
NL (1) NL8503250A (ja)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4878219A (en) * 1988-04-28 1989-10-31 Digital Equipment Corporation Method and apparatus for nodes in network to avoid shrinkage of an interframe gap
DE3843372C2 (de) * 1988-12-23 1997-03-27 Bosch Gmbh Robert Verfahren und Schaltungsanordnung zur Taktanpassung in der digitalen Nachrichtentechnik
US5274647A (en) * 1989-02-13 1993-12-28 Kabushiki Kaisha Toshiba Elastic buffer with error detection using a hamming distance circuit
US5200960A (en) * 1990-09-21 1993-04-06 Xerox Corporation Streaming tape diagnostic
SE515563C2 (sv) * 1995-01-11 2001-08-27 Ericsson Telefon Ab L M Dataöverföringssystem
US5805794A (en) * 1996-03-28 1998-09-08 Cypress Semiconductor Corp. CPLD serial programming with extra read register
US5768288A (en) * 1996-03-28 1998-06-16 Cypress Semiconductor Corp. Method and apparatus for programming a programmable logic device having verify logic for comparing verify data read from a memory location with program data
US5815510A (en) * 1996-03-28 1998-09-29 Cypress Semiconductor Corp. Serial programming of instruction codes in different numbers of clock cycles
US5835503A (en) * 1996-03-28 1998-11-10 Cypress Semiconductor Corp. Method and apparatus for serially programming a programmable logic device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3134091A (en) * 1957-07-02 1964-05-19 Ibm Means to read out less than all bits in a register
DE1549053B2 (de) * 1967-10-13 1970-11-05 Siemens AG, 1000 Berlin u. 8000 München Schaltungsanordnung zur Überwachung von Einschreibvorgängen bei Speichern
ES444381A1 (es) * 1975-01-16 1977-12-16 Standard Electrica Sa Un circuito almacenador de canal de datos digitales para transmision y recepcion.
US4314355A (en) * 1977-05-18 1982-02-02 Martin Marietta Corporation Apparatus and method for receiving digital data at a first rate and outputting the data at a different rate
US4175287A (en) * 1978-01-23 1979-11-20 Rockwell International Corporation Elastic store slip control circuit apparatus and method for preventing overlapping sequential read and write operations
US4193123A (en) * 1978-03-20 1980-03-11 Bell Telephone Laboratories, Incorporated Fault detection in data rate conversion systems using a first-in, first-out buffer
DE3213345C2 (de) * 1982-04-08 1984-11-22 Siemens Ag, 1000 Berlin Und 8000 Muenchen Datenübertragungseinrichtung zwischen zwei asynchron gesteuerten Datenverarbeitungssystemen
US4580279A (en) * 1984-04-16 1986-04-01 At&T Bell Laboratories Elastic store slip control and maintenance circuit
JPS61109155A (ja) * 1984-11-01 1986-05-27 Mitsubishi Electric Corp パリテイ検出回路

Also Published As

Publication number Publication date
DE3677355D1 (de) 1991-03-07
JPH0710063B2 (ja) 1995-02-01
EP0227145B1 (en) 1991-01-30
US4860293A (en) 1989-08-22
EP0227145A1 (en) 1987-07-01
JPS62136940A (ja) 1987-06-19

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A1B A search report has been drawn up
BV The patent application has lapsed