NL7700420A - Halfgeleiderinrichting en werkwijze ter ver- vaardiging daarvan. - Google Patents

Halfgeleiderinrichting en werkwijze ter ver- vaardiging daarvan.

Info

Publication number
NL7700420A
NL7700420A NL7700420A NL7700420A NL7700420A NL 7700420 A NL7700420 A NL 7700420A NL 7700420 A NL7700420 A NL 7700420A NL 7700420 A NL7700420 A NL 7700420A NL 7700420 A NL7700420 A NL 7700420A
Authority
NL
Netherlands
Prior art keywords
semi
manufacturing
conductor device
conductor
Prior art date
Application number
NL7700420A
Other languages
English (en)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL7700420A priority Critical patent/NL7700420A/nl
Priority to US05/847,723 priority patent/US4183037A/en
Priority to DE2800363A priority patent/DE2800363C2/de
Priority to CA294,799A priority patent/CA1094692A/en
Priority to JP324278A priority patent/JPS5390779A/ja
Priority to FR7801216A priority patent/FR2377705A1/fr
Publication of NL7700420A publication Critical patent/NL7700420A/nl

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233Integrated injection logic structures [I2L]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5221Crossover interconnections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53271Conductive materials containing semiconductor material, e.g. polysilicon
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/091Integrated injection logic or merged transistor logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
NL7700420A 1977-01-17 1977-01-17 Halfgeleiderinrichting en werkwijze ter ver- vaardiging daarvan. NL7700420A (nl)

Priority Applications (6)

Application Number Priority Date Filing Date Title
NL7700420A NL7700420A (nl) 1977-01-17 1977-01-17 Halfgeleiderinrichting en werkwijze ter ver- vaardiging daarvan.
US05/847,723 US4183037A (en) 1977-01-17 1977-11-02 Semiconductor device
DE2800363A DE2800363C2 (de) 1977-01-17 1978-01-05 Halbleiteranordnung und Verfahren zu deren Herstellung
CA294,799A CA1094692A (en) 1977-01-17 1978-01-12 Semiconductor device with layer of refractory material
JP324278A JPS5390779A (en) 1977-01-17 1978-01-14 Semiconductor and method of producing same
FR7801216A FR2377705A1 (fr) 1977-01-17 1978-01-17 Dispositif semi-conducteur, et procede pour sa fabrication

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7700420A NL7700420A (nl) 1977-01-17 1977-01-17 Halfgeleiderinrichting en werkwijze ter ver- vaardiging daarvan.

Publications (1)

Publication Number Publication Date
NL7700420A true NL7700420A (nl) 1978-07-19

Family

ID=19827780

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7700420A NL7700420A (nl) 1977-01-17 1977-01-17 Halfgeleiderinrichting en werkwijze ter ver- vaardiging daarvan.

Country Status (6)

Country Link
US (1) US4183037A (nl)
JP (1) JPS5390779A (nl)
CA (1) CA1094692A (nl)
DE (1) DE2800363C2 (nl)
FR (1) FR2377705A1 (nl)
NL (1) NL7700420A (nl)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2816949C3 (de) * 1978-04-19 1981-07-16 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierte Halbleiteranordnung und deren Verwendung zum Aufbau einer Speicheranordnung
JPS55138868A (en) * 1979-04-17 1980-10-30 Toshiba Corp Bipolar integrated circuit and method of fabricating the same
US4244001A (en) * 1979-09-28 1981-01-06 Rca Corporation Fabrication of an integrated injection logic device with narrow basewidth
JPS56115560A (en) * 1980-02-18 1981-09-10 Toshiba Corp Manufacture of semiconductor device
JPS5852870A (ja) * 1981-09-25 1983-03-29 Hitachi Ltd 半導体集積回路装置
JPS58127363A (ja) * 1982-01-25 1983-07-29 Hitachi Ltd 半導体集積回路装置
JPS594050A (ja) * 1982-06-30 1984-01-10 Fujitsu Ltd 半導体装置
DE102004015654A1 (de) * 2003-04-02 2004-10-21 Luk Lamellen Und Kupplungsbau Beteiligungs Kg Endstufe zum Ansteuern einer elektrischen Maschine

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6606912A (nl) * 1966-05-19 1967-11-20
NL7107040A (nl) * 1971-05-22 1972-11-24
GB1447675A (en) * 1973-11-23 1976-08-25 Mullard Ltd Semiconductor devices
IT1061530B (it) * 1975-06-12 1983-04-30 Ncr Co Metodo per la formazione di connessioni elettriche in regioni selezionate di una superficie di un dispositivo semiconduttore a circuito integrato
US4109275A (en) * 1976-12-22 1978-08-22 International Business Machines Corporation Interconnection of integrated circuit metallization

Also Published As

Publication number Publication date
DE2800363A1 (de) 1978-07-20
US4183037A (en) 1980-01-08
CA1094692A (en) 1981-01-27
FR2377705B1 (nl) 1983-04-29
FR2377705A1 (fr) 1978-08-11
DE2800363C2 (de) 1985-02-21
JPS5390779A (en) 1978-08-09

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Legal Events

Date Code Title Description
BC A request for examination has been filed
A85 Still pending on 85-01-01
BI The patent application has been withdrawn