IT7821408A0 - Wafer perfezionato. - Google Patents

Wafer perfezionato.

Info

Publication number
IT7821408A0
IT7821408A0 IT7821408A IT2140878A IT7821408A0 IT 7821408 A0 IT7821408 A0 IT 7821408A0 IT 7821408 A IT7821408 A IT 7821408A IT 2140878 A IT2140878 A IT 2140878A IT 7821408 A0 IT7821408 A0 IT 7821408A0
Authority
IT
Italy
Prior art keywords
perfected
wafer
perfected wafer
Prior art date
Application number
IT7821408A
Other languages
English (en)
Other versions
IT1113165B (it
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7821408A0 publication Critical patent/IT7821408A0/it
Application granted granted Critical
Publication of IT1113165B publication Critical patent/IT1113165B/it

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • G01B11/30—Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces
    • G01B11/303—Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces using photoelectric detection means
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B3/00—Measuring instruments characterised by the use of mechanical techniques
    • G01B3/02—Rulers with scales or marks for direct reading
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/975—Substrate or mask aligning feature

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
  • Thin Magnetic Films (AREA)
IT21408/78A 1977-03-24 1978-03-21 Wafer perfezionato IT1113165B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/780,877 US4134066A (en) 1977-03-24 1977-03-24 Wafer indexing system using a grid pattern and coding and orientation marks in each grid cell

Publications (2)

Publication Number Publication Date
IT7821408A0 true IT7821408A0 (it) 1978-03-21
IT1113165B IT1113165B (it) 1986-01-20

Family

ID=25120973

Family Applications (1)

Application Number Title Priority Date Filing Date
IT21408/78A IT1113165B (it) 1977-03-24 1978-03-21 Wafer perfezionato

Country Status (8)

Country Link
US (1) US4134066A (it)
JP (1) JPS6030896B2 (it)
CA (1) CA1117653A (it)
DE (1) DE2809359C2 (it)
FR (1) FR2385103A1 (it)
GB (1) GB1591002A (it)
IT (1) IT1113165B (it)
NL (1) NL7802571A (it)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114046749A (zh) * 2021-10-26 2022-02-15 刘红霞 预制混凝土构件点状凹坑结合面粗糙度检测方法及系统

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3122984A1 (de) * 1981-06-10 1983-01-27 Siemens AG, 1000 Berlin und 8000 München Verfahren zur kennzeichnung von halbleiterchips und kennzeichenbarer helbleiterchip
US4388386A (en) * 1982-06-07 1983-06-14 International Business Machines Corporation Mask set mismatch
US4814626A (en) * 1985-12-13 1989-03-21 Siemens Aktiengesellschaft Method for high precision position measurement of two-dimensional structures
KR900008384B1 (ko) * 1986-05-20 1990-11-17 후지쓰 가부시끼가이샤 바아 코우드 패턴을 형성시킨 반도체 웨이퍼의 식별방법 및 반도체 장치의 제조방법
CH670592A5 (it) * 1986-09-22 1989-06-30 Lasarray Holding Ag
JP2754609B2 (ja) * 1988-06-08 1998-05-20 日本電気株式会社 半導体装置の製造方法
DE4038723A1 (de) * 1990-12-05 1992-06-11 Bosch Gmbh Robert Auf einer platte gemeinsam hergestellte und danach vereinzelte, gleichartige halbleiter-chips mit indizierung
US5256578A (en) * 1991-12-23 1993-10-26 Motorola, Inc. Integral semiconductor wafer map recording
KR0154158B1 (ko) * 1994-07-14 1998-12-01 김주용 반도체소자의 공정결함 검사방법
JPH10177245A (ja) * 1996-12-18 1998-06-30 Fujitsu Ltd レチクル、半導体基板及び半導体チップ
US6889162B1 (en) * 2000-03-07 2005-05-03 Koninklijke Philips Electronics N.V. Wafer target design and method for determining centroid of wafer target
US7531907B2 (en) * 2005-04-29 2009-05-12 Hitachi Global Storage Technologies Netherlands B.V. System and method for forming serial numbers on HDD wafers
JP4665005B2 (ja) * 2008-02-27 2011-04-06 シャープ株式会社 半導体装置およびその製造方法、電子情報機器
KR20110069887A (ko) * 2008-11-17 2011-06-23 에프. 호프만-라 로슈 아게 인자 ｖｉｉ 유전자의 발현을 저해하기 위한 조성물 및 방법
FI128447B (en) * 2016-04-26 2020-05-15 Teknologian Tutkimuskeskus Vtt Oy Apparatus associated with analysis of thin film layers and method of making them

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1024961A (en) * 1963-02-21 1966-04-06 Eastman Kodak Co Improvements relating to a method of preparing an index file from recorded information and index patterns
DE1948661A1 (de) * 1968-11-04 1970-05-06 Molekularelektronik Schaltungsanordnung zur Realisierung bestimmter typischer Prozessschritte beim Herstellen und/oder Pruefen von Halbleiterbauelementen,insbesondere zum automatischen Einordnen beliebiger Fremdstrukturen in ein Rasterschema
FR2033713A5 (fr) * 1969-03-19 1970-12-04 Molekularelektronik Procede pour l'obtention de matrices photographiques a motifs recurrents de toute grandeur voulue et disposes dans un champ de caches decales d'une maniere definie par rapport a un point fixe, et disposit
US3607347A (en) * 1969-08-04 1971-09-21 Sprague Electric Co Data reduction and storage
US3645626A (en) * 1970-06-15 1972-02-29 Ibm Apparatus for detecting defects by optical scanning
LU65252A1 (it) * 1971-04-28 1972-07-14
DE2226149A1 (de) * 1971-11-02 1973-05-10 Halbleiterwerk Frankfurt Oder Verfahren zum erkennen der groesse von lage-, winkel- und ueberdeckungsfehlern bei der herstellung und anwendung von schablonen in der halbleitertechnik
US3742229A (en) * 1972-06-29 1973-06-26 Massachusetts Inst Technology Soft x-ray mask alignment system
US3863764A (en) * 1974-02-28 1975-02-04 Western Electric Co Methods and apparatus for identifying nonmagnetic articles
US3998639A (en) * 1974-11-19 1976-12-21 Bell Telephone Laboratories, Incorporated Methods for determining feature-size accuracy of circuit patterns
US3963354A (en) * 1975-05-05 1976-06-15 Bell Telephone Laboratories, Incorporated Inspection of masks and wafers by image dissection
JPS51140199A (en) * 1975-05-30 1976-12-02 Hitachi Metals Ltd Crystal working process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114046749A (zh) * 2021-10-26 2022-02-15 刘红霞 预制混凝土构件点状凹坑结合面粗糙度检测方法及系统

Also Published As

Publication number Publication date
JPS53118797A (en) 1978-10-17
DE2809359C2 (de) 1984-01-26
FR2385103B1 (it) 1980-08-29
CA1117653A (en) 1982-02-02
IT1113165B (it) 1986-01-20
US4134066A (en) 1979-01-09
GB1591002A (en) 1981-06-10
FR2385103A1 (fr) 1978-10-20
NL7802571A (nl) 1978-09-26
JPS6030896B2 (ja) 1985-07-19
DE2809359A1 (de) 1978-09-28

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