NL193475C - Microprocessorinrichting. - Google Patents

Microprocessorinrichting. Download PDF

Info

Publication number
NL193475C
NL193475C NL8503492A NL8503492A NL193475C NL 193475 C NL193475 C NL 193475C NL 8503492 A NL8503492 A NL 8503492A NL 8503492 A NL8503492 A NL 8503492A NL 193475 C NL193475 C NL 193475C
Authority
NL
Netherlands
Prior art keywords
blocks
input
ram
core
output
Prior art date
Application number
NL8503492A
Other languages
English (en)
Dutch (nl)
Other versions
NL193475B (nl
NL8503492A (nl
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP59281593A external-priority patent/JPH0658691B2/ja
Priority claimed from JP59281594A external-priority patent/JPH0632052B2/ja
Priority claimed from JP28159284A external-priority patent/JPS61156356A/ja
Application filed by Sony Corp filed Critical Sony Corp
Publication of NL8503492A publication Critical patent/NL8503492A/nl
Publication of NL193475B publication Critical patent/NL193475B/xx
Application granted granted Critical
Publication of NL193475C publication Critical patent/NL193475C/nl

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7814Specially adapted for real time processing, e.g. comprising hardware timers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Executing Machine-Instructions (AREA)
NL8503492A 1984-12-27 1985-12-18 Microprocessorinrichting. NL193475C (nl)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP28159284 1984-12-27
JP59281593A JPH0658691B2 (ja) 1984-12-27 1984-12-27 マイクロコンピユ−タ
JP59281594A JPH0632052B2 (ja) 1984-12-27 1984-12-27 マイクロコンピユ−タ
JP28159384 1984-12-27
JP28159484 1984-12-27
JP28159284A JPS61156356A (ja) 1984-12-27 1984-12-27 マイクロコンピユ−タ

Publications (3)

Publication Number Publication Date
NL8503492A NL8503492A (nl) 1986-07-16
NL193475B NL193475B (nl) 1999-07-01
NL193475C true NL193475C (nl) 1999-11-02

Family

ID=27336859

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8503492A NL193475C (nl) 1984-12-27 1985-12-18 Microprocessorinrichting.

Country Status (9)

Country Link
US (1) US5025368A (fr)
CN (1) CN1033293C (fr)
AT (1) AT401695B (fr)
AU (1) AU582409B2 (fr)
CA (1) CA1242803A (fr)
DE (1) DE3545937A1 (fr)
FR (1) FR2575564B1 (fr)
GB (1) GB2172142B (fr)
NL (1) NL193475C (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5243700A (en) * 1988-12-30 1993-09-07 Larsen Robert E Port expander architecture for mapping a first set of addresses to external memory and mapping a second set of addresses to an I/O port
US5253181A (en) * 1989-04-27 1993-10-12 Kawasaki Steel Corporation Programmable one-board computer, and methods of verification of logic circuit and alteration to actual circuit using the programmable one-board computer
US5539911A (en) * 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
KR930702726A (ko) * 1991-07-08 1993-09-09 아이자와 스스무 분리된 구조적 의존도를 가진 알 아이 에스 씨(risc) 마이크로프로세서 구조
EP0547240B1 (fr) * 1991-07-08 2000-01-12 Seiko Epson Corporation Architecture risc de microprocesseur avec mode d'interruption et d'exception rapide
US5961629A (en) * 1991-07-08 1999-10-05 Seiko Epson Corporation High performance, superscalar-based computer system with out-of-order instruction execution
EP1526446A3 (fr) * 1991-07-08 2007-04-04 Seiko Epson Corporation Architecture RISC extensible de microprocesseur
US5438668A (en) 1992-03-31 1995-08-01 Seiko Epson Corporation System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer
US5274770A (en) * 1992-07-29 1993-12-28 Tritech Microelectronics International Pte Ltd. Flexible register-based I/O microcontroller with single cycle instruction execution
US6735685B1 (en) 1992-09-29 2004-05-11 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor
WO1994008287A1 (fr) 1992-09-29 1994-04-14 Seiko Epson Corporation Systeme et procede pour la gestion des operations de chargement et/ou de stockage dans un microprocesseur superscalaire
JPH08212185A (ja) * 1995-01-31 1996-08-20 Mitsubishi Electric Corp マイクロコンピュータ
US7487339B2 (en) * 2001-10-12 2009-02-03 Mips Technologies, Inc. Method and apparatus for binding shadow registers to vectored interrupts
US7552261B2 (en) * 2001-10-12 2009-06-23 Mips Technologies, Inc. Configurable prioritization of core generated interrupts

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4471461A (en) * 1977-12-02 1984-09-11 Texas Instruments Incorporated Variable function programmed system
US4349870A (en) * 1979-09-05 1982-09-14 Motorola, Inc. Microcomputer with programmable multi-function port
US4447881A (en) * 1980-05-29 1984-05-08 Texas Instruments Incorporated Data processing system integrated circuit having modular memory add-on capacity
US4393464A (en) * 1980-12-12 1983-07-12 Ncr Corporation Chip topography for integrated circuit communication controller
DE3121174C2 (de) * 1981-05-27 1985-11-07 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung in einem Prozessor
US4471426A (en) * 1981-07-02 1984-09-11 Texas Instruments Incorporated Microcomputer which fetches two sets of microcode bits at one time
JPS59119925A (ja) * 1982-12-27 1984-07-11 Toshiba Corp 論理回路
US4649474A (en) * 1983-09-23 1987-03-10 Western Digital Corporation Chip topography for a MOS disk memory controller circuit

Also Published As

Publication number Publication date
GB2172142B (en) 1988-10-19
CA1242803A (fr) 1988-10-04
DE3545937A1 (de) 1986-07-10
GB8531799D0 (en) 1986-02-05
AU582409B2 (en) 1989-03-23
CN1033293C (zh) 1996-11-13
AT401695B (de) 1996-11-25
CN85109704A (zh) 1986-07-02
FR2575564B1 (fr) 1989-07-28
AU5147885A (en) 1986-07-03
GB2172142A (en) 1986-09-10
FR2575564A1 (fr) 1986-07-04
NL193475B (nl) 1999-07-01
NL8503492A (nl) 1986-07-16
US5025368A (en) 1991-06-18

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Legal Events

Date Code Title Description
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
V1 Lapsed because of non-payment of the annual fee

Effective date: 20030701