NL193335C - Inrichting voor het opwekken van een golfvorm met tweevoudige helling. - Google Patents

Inrichting voor het opwekken van een golfvorm met tweevoudige helling. Download PDF

Info

Publication number
NL193335C
NL193335C NL8802390A NL8802390A NL193335C NL 193335 C NL193335 C NL 193335C NL 8802390 A NL8802390 A NL 8802390A NL 8802390 A NL8802390 A NL 8802390A NL 193335 C NL193335 C NL 193335C
Authority
NL
Netherlands
Prior art keywords
output
gate
inverter
transistor
input
Prior art date
Application number
NL8802390A
Other languages
English (en)
Dutch (nl)
Other versions
NL193335B (nl
NL8802390A (nl
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of NL8802390A publication Critical patent/NL8802390A/nl
Publication of NL193335B publication Critical patent/NL193335B/xx
Application granted granted Critical
Publication of NL193335C publication Critical patent/NL193335C/nl

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions
    • H03K4/02—Generating pulses having essentially a finite slope or stepped portions having stepped portions, e.g. staircase waveform
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Manipulation Of Pulses (AREA)
NL8802390A 1987-12-08 1988-09-29 Inrichting voor het opwekken van een golfvorm met tweevoudige helling. NL193335C (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019870014053A KR900008436B1 (ko) 1987-12-08 1987-12-08 듀얼 슬로프 파형 발생회로
KR870014053 1987-12-08

Publications (3)

Publication Number Publication Date
NL8802390A NL8802390A (nl) 1989-07-03
NL193335B NL193335B (nl) 1999-02-01
NL193335C true NL193335C (nl) 1999-06-02

Family

ID=19266795

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8802390A NL193335C (nl) 1987-12-08 1988-09-29 Inrichting voor het opwekken van een golfvorm met tweevoudige helling.

Country Status (6)

Country Link
US (1) US4894560A (ko)
JP (1) JPH0775317B2 (ko)
KR (1) KR900008436B1 (ko)
FR (1) FR2624328B1 (ko)
GB (1) GB2213668B (ko)
NL (1) NL193335C (ko)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5004936A (en) * 1989-03-31 1991-04-02 Texas Instruments Incorporated Non-loading output driver circuit
US4958093A (en) * 1989-05-25 1990-09-18 International Business Machines Corporation Voltage clamping circuits with high current capability
US5121013A (en) * 1990-02-12 1992-06-09 Advanced Micro Devices, Inc. Noise reducing output buffer circuit with feedback path
KR920010346B1 (ko) * 1990-05-23 1992-11-27 삼성전자 주식회사 반도체 메모리의 센스앰프 구동회로
US5241221A (en) * 1990-07-06 1993-08-31 North American Philips Corp., Signetics Div. CMOS driver circuit having reduced switching noise
US5319252A (en) * 1992-11-05 1994-06-07 Xilinx, Inc. Load programmable output buffer
US5448181A (en) * 1992-11-06 1995-09-05 Xilinx, Inc. Output buffer circuit having reduced switching noise
JP3194636B2 (ja) * 1993-01-12 2001-07-30 三菱電機株式会社 レベル変換回路、レベル変換回路を内蔵したエミュレータ用マイクロコンピュータ、レベル変換回路を内蔵したピギーバックマイクロコンピュータ、レベル変換回路を内蔵したエミュレートシステム及びレベル変換回路を内蔵したｌｓｉテストシステム
US5481500A (en) * 1994-07-22 1996-01-02 International Business Machines Corporation Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories
JP3442149B2 (ja) * 1994-07-28 2003-09-02 富士通株式会社 半導体回路
FR2847354B1 (fr) * 2002-11-18 2005-01-28 Atmel Nantes Sa Circuit tampon de sortie a commande en tension differee, et composant integre correspondant
JP4015937B2 (ja) * 2002-12-06 2007-11-28 松下電器産業株式会社 デューティ比補正回路
US9162255B1 (en) * 2010-01-13 2015-10-20 Fujifilm Sonosite, Inc. Tunable ultrasound transmitter
US8188773B1 (en) * 2011-03-29 2012-05-29 King Fahd University Of Petroleum & Minerals Voltage-controlled dual-slope square and triangular waveform generator
US9467143B1 (en) 2015-09-24 2016-10-11 Qualcomm Incorporated Inversely proportional voltage-delay buffers for buffering data according to data voltage levels
DE102021111796A1 (de) * 2021-03-19 2022-09-22 Infineon Technologies Ag Hochgeschwindigkeitsdigitalsignaltreiber mit niedrigem leistungsverbrauch

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58116759A (ja) * 1981-12-29 1983-07-12 Fujitsu Ltd 出力ドライバ回路
JPS5974721A (ja) * 1982-10-21 1984-04-27 Toshiba Corp シユミツト・トリガ回路
JPH07107978B2 (ja) * 1985-11-07 1995-11-15 ロ−ム株式会社 Ｃ−ｍｏｓ回路

Also Published As

Publication number Publication date
GB2213668B (en) 1991-11-27
FR2624328A1 (fr) 1989-06-09
KR890011209A (ko) 1989-08-14
KR900008436B1 (ko) 1990-11-20
JPH01174010A (ja) 1989-07-10
NL193335B (nl) 1999-02-01
US4894560A (en) 1990-01-16
GB8822742D0 (en) 1988-11-02
GB2213668A (en) 1989-08-16
NL8802390A (nl) 1989-07-03
FR2624328B1 (fr) 1992-10-30
JPH0775317B2 (ja) 1995-08-09

Similar Documents

Publication Publication Date Title
NL193335C (nl) Inrichting voor het opwekken van een golfvorm met tweevoudige helling.
US4479216A (en) Skew-free clock circuit for integrated circuit chip
EP0269185B1 (en) Switching device with dynamic hysteresis
US4321661A (en) Apparatus for charging a capacitor
JP2541585B2 (ja) リセット信号発生回路
US4763023A (en) Clocked CMOS bus precharge circuit having level sensing
KR870006701A (ko) 출력제한 전류비를 제공하는 출력버퍼 및 제어회로
JPS5937895B2 (ja) 遅延回路
NL8703021A (nl) Geregelde cmos-substraatspanningsgenerator.
KR960039641A (ko) 고내압회로 및 전압레벨 변환회로
US5546029A (en) Output driver circuit having reduced electromagnetic interference
KR890009090A (ko) 집적 전압 증배기 회로
US5650671A (en) Charge pump circuit
KR910015114A (ko) 반도체 디지탈 회로
JPH10224191A (ja) 遅延回路
NL8800234A (nl) Geintegreerde schakeling met logische circuits en ten minste een push-pull-trap.
US5382840A (en) Analog delay circuit configuration
US4472645A (en) Clock circuit for generating non-overlapping pulses
KR960039569A (ko) 승압 회로
US3946245A (en) Fast-acting feedforward kicker circuit for use with two serially connected inverters
US4587441A (en) Interface circuit for signal generators with two non-overlapping phases
EP0069444B1 (en) Trigger pulse generator
US4555644A (en) Output interface for a three-state logic circuit in an integrated circuit using MOS transistors
US3673438A (en) Mos integrated circuit driver system
US3193702A (en) Means for controlling bistable transistor trigger circuits

Legal Events

Date Code Title Description
A1A A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
V4 Lapsed because of reaching the maximum lifetime of a patent

Effective date: 20080929