NL182999C - Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij in een halfgeleiderlichaam een begraven laag van isolerend materiaal wordt gevormd. - Google Patents

Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij in een halfgeleiderlichaam een begraven laag van isolerend materiaal wordt gevormd.

Info

Publication number
NL182999C
NL182999C NLAANVRAGE7802260,A NL7802260A NL182999C NL 182999 C NL182999 C NL 182999C NL 7802260 A NL7802260 A NL 7802260A NL 182999 C NL182999 C NL 182999C
Authority
NL
Netherlands
Prior art keywords
conductor
bemi
semi
manufacturing
insulated material
Prior art date
Application number
NLAANVRAGE7802260,A
Other languages
English (en)
Dutch (nl)
Other versions
NL7802260A (nl
Inventor
Katsutoshi Izumi
Masanobu Doken
Hisashi Ariyoshi
Original Assignee
Nippon Telegraph & Telephone
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph & Telephone filed Critical Nippon Telegraph & Telephone
Publication of NL7802260A publication Critical patent/NL7802260A/xx
Application granted granted Critical
Publication of NL182999C publication Critical patent/NL182999C/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26533—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78612—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/78654—Monocrystalline silicon transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76267—Vertical isolation by silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281—Lateral isolation by selective oxidation of silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76289—Lateral isolation by air gap

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
  • Thin Film Transistor (AREA)
NLAANVRAGE7802260,A 1977-11-28 1978-03-01 Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij in een halfgeleiderlichaam een begraven laag van isolerend materiaal wordt gevormd. NL182999C (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14159977A JPS5721856B2 (en) 1977-11-28 1977-11-28 Semiconductor and its manufacture

Publications (2)

Publication Number Publication Date
NL7802260A NL7802260A (nl) 1979-05-30
NL182999C true NL182999C (nl) 1988-06-16

Family

ID=15295748

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7802260,A NL182999C (nl) 1977-11-28 1978-03-01 Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij in een halfgeleiderlichaam een begraven laag van isolerend materiaal wordt gevormd.

Country Status (7)

Country Link
US (1) US4241359A (de)
JP (1) JPS5721856B2 (de)
CA (1) CA1095183A (de)
DE (1) DE2808257C3 (de)
FR (1) FR2410364B1 (de)
GB (1) GB1601676A (de)
NL (1) NL182999C (de)

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JPS5626467A (en) * 1979-08-10 1981-03-14 Toshiba Corp Semiconductor device and the manufacturing process
JPS5662369A (en) * 1979-10-26 1981-05-28 Toshiba Corp Mos semiconductor device
JPS56105652A (en) * 1980-01-28 1981-08-22 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS577161A (en) * 1980-06-16 1982-01-14 Toshiba Corp Mos semiconductor device
JPS5739579A (en) * 1980-08-20 1982-03-04 Toshiba Corp Mos semiconductor device and manufacture thereof
JPS5742161A (en) * 1980-08-28 1982-03-09 Fujitsu Ltd Semiconductor and production thereof
JPS5752167A (en) * 1980-09-16 1982-03-27 Nippon Telegr & Teleph Corp <Ntt> Insulated gate type field effect transistor and manufacture thereof
JPS5754370A (en) * 1980-09-19 1982-03-31 Nippon Telegr & Teleph Corp <Ntt> Insulating gate type transistor
GB2085224B (en) * 1980-10-07 1984-08-15 Itt Ind Ltd Isolating sc device using oxygen duping
JPS5854672A (ja) * 1981-09-28 1983-03-31 Fujitsu Ltd 半導体装置
JPS58176967A (ja) * 1982-04-12 1983-10-17 Toshiba Corp 半導体装置の製造方法
JPS59170555A (ja) * 1983-03-15 1984-09-26 Iseki & Co Ltd 農作業機の動力伝導装置
JPS6035955U (ja) * 1983-08-19 1985-03-12 ヤンマー農機株式会社 農機の無段変速装置
FR2563377B1 (fr) * 1984-04-19 1987-01-23 Commissariat Energie Atomique Procede de fabrication d'une couche isolante enterree dans un substrat semi-conducteur, par implantation ionique
US4686758A (en) * 1984-06-27 1987-08-18 Honeywell Inc. Three-dimensional CMOS using selective epitaxial growth
JPS61177742A (ja) * 1985-02-01 1986-08-09 Mitsubishi Electric Corp 半導体装置
FR2581795B1 (fr) * 1985-05-10 1988-06-17 Golanski Andrzej Procede de fabrication d'une couche isolante continue enterree dans un substrat semi-conducteur, par implantation ionique
US4717677A (en) * 1985-08-19 1988-01-05 Motorola Inc. Fabricating a semiconductor device with buried oxide
US4662059A (en) * 1985-09-19 1987-05-05 Rca Corporation Method of making stabilized silicon-on-insulator field-effect transistors having 100 oriented side and top surfaces
US4700454A (en) * 1985-11-04 1987-10-20 Intel Corporation Process for forming MOS transistor with buried oxide regions for insulation
US4683637A (en) * 1986-02-07 1987-08-04 Motorola, Inc. Forming depthwise isolation by selective oxygen/nitrogen deep implant and reaction annealing
JPS632350A (ja) * 1986-06-20 1988-01-07 Fujitsu Ltd 半導体装置の製造方法
US5043778A (en) * 1986-08-11 1991-08-27 Texas Instruments Incorporated Oxide-isolated source/drain transistor
US4862232A (en) * 1986-09-22 1989-08-29 General Motors Corporation Transistor structure for high temperature logic circuits with insulation around source and drain regions
JPS63119218A (ja) * 1986-11-07 1988-05-23 Canon Inc 半導体基材とその製造方法
JPS63157475A (ja) * 1986-12-20 1988-06-30 Toshiba Corp 半導体装置及びその製造方法
US5115289A (en) * 1988-11-21 1992-05-19 Hitachi, Ltd. Semiconductor device and semiconductor memory device
US5080730A (en) * 1989-04-24 1992-01-14 Ibis Technology Corporation Implantation profile control with surface sputtering
WO1992005580A1 (en) * 1990-09-14 1992-04-02 Westinghouse Electric Corporation Monolithic microwave integrated circuit on high resistivity silicon
US6884701B2 (en) * 1991-04-27 2005-04-26 Hidemi Takasu Process for fabricating semiconductor device
KR960002765B1 (ko) * 1992-12-22 1996-02-26 금성일렉트론주식회사 절연체 위에 단결정 반도체 제조방법
US6228779B1 (en) 1998-11-06 2001-05-08 Novellus Systems, Inc. Ultra thin oxynitride and nitride/oxide stacked gate dielectrics fabricated by high pressure technology
US6383924B1 (en) 2000-12-13 2002-05-07 Micron Technology, Inc. Method of forming buried conductor patterns by surface transformation of empty spaces in solid state materials
US7142577B2 (en) 2001-05-16 2006-11-28 Micron Technology, Inc. Method of forming mirrors by surface transformation of empty spaces in solid state materials and structures thereon
US6898362B2 (en) * 2002-01-17 2005-05-24 Micron Technology Inc. Three-dimensional photonic crystal waveguide structure and method
US7041575B2 (en) * 2003-04-29 2006-05-09 Micron Technology, Inc. Localized strained semiconductor on insulator
US6987037B2 (en) * 2003-05-07 2006-01-17 Micron Technology, Inc. Strained Si/SiGe structures by ion implantation
US7501329B2 (en) 2003-05-21 2009-03-10 Micron Technology, Inc. Wafer gettering using relaxed silicon germanium epitaxial proximity layers
US7008854B2 (en) 2003-05-21 2006-03-07 Micron Technology, Inc. Silicon oxycarbide substrates for bonded silicon on insulator
US7273788B2 (en) 2003-05-21 2007-09-25 Micron Technology, Inc. Ultra-thin semiconductors bonded on glass substrates
US7662701B2 (en) 2003-05-21 2010-02-16 Micron Technology, Inc. Gettering of silicon on insulator using relaxed silicon germanium epitaxial proximity layers
US6929984B2 (en) * 2003-07-21 2005-08-16 Micron Technology Inc. Gettering using voids formed by surface transformation
US7439158B2 (en) 2003-07-21 2008-10-21 Micron Technology, Inc. Strained semiconductor by full wafer bonding
US7153753B2 (en) 2003-08-05 2006-12-26 Micron Technology, Inc. Strained Si/SiGe/SOI islands and processes of making same
US7396779B2 (en) 2003-09-24 2008-07-08 Micron Technology, Inc. Electronic apparatus, silicon-on-insulator integrated circuits, and fabrication methods
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US3622382A (en) * 1969-05-05 1971-11-23 Ibm Semiconductor isolation structure and method of producing
US3666548A (en) * 1970-01-06 1972-05-30 Ibm Monocrystalline semiconductor body having dielectrically isolated regions and method of forming
US3840409A (en) * 1970-03-16 1974-10-08 Ibm Insulating layer pedestal transistor device and process
US3707765A (en) * 1970-11-19 1973-01-02 Motorola Inc Method of making isolated semiconductor devices
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US3791024A (en) * 1971-10-21 1974-02-12 Rca Corp Fabrication of monolithic integrated circuits
US3873373A (en) * 1972-07-06 1975-03-25 Bryan H Hill Fabrication of a semiconductor device
US3886587A (en) * 1973-07-19 1975-05-27 Harris Corp Isolated photodiode array
US3855009A (en) * 1973-09-20 1974-12-17 Texas Instruments Inc Ion-implantation and conventional epitaxy to produce dielectrically isolated silicon layers
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JPS6041458B2 (ja) * 1975-04-21 1985-09-17 ソニー株式会社 半導体装置の製造方法
US3976511A (en) * 1975-06-30 1976-08-24 Ibm Corporation Method for fabricating integrated circuit structures with full dielectric isolation by ion bombardment

Also Published As

Publication number Publication date
GB1601676A (en) 1981-11-04
DE2808257A1 (de) 1979-05-31
CA1095183A (en) 1981-02-03
JPS5721856B2 (en) 1982-05-10
DE2808257C3 (de) 1981-12-24
FR2410364B1 (fr) 1983-01-21
JPS5474682A (en) 1979-06-14
NL7802260A (nl) 1979-05-30
US4241359A (en) 1980-12-23
FR2410364A1 (fr) 1979-06-22
DE2808257B2 (de) 1981-02-19

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