KR970072708A - Pll 회로 - Google Patents

Pll 회로 Download PDF

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Publication number
KR970072708A
KR970072708A KR1019960058717A KR19960058717A KR970072708A KR 970072708 A KR970072708 A KR 970072708A KR 1019960058717 A KR1019960058717 A KR 1019960058717A KR 19960058717 A KR19960058717 A KR 19960058717A KR 970072708 A KR970072708 A KR 970072708A
Authority
KR
South Korea
Prior art keywords
frequency
oscillation frequency
phase comparator
controlled oscillator
loop filter
Prior art date
Application number
KR1019960058717A
Other languages
English (en)
Other versions
KR100253524B1 (ko
Inventor
아쯔오 야마구찌
Original Assignee
기따오까 다까시
미쯔비시 덴끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 기따오까 다까시, 미쯔비시 덴끼 가부시끼가이샤 filed Critical 기따오까 다까시
Publication of KR970072708A publication Critical patent/KR970072708A/ko
Application granted granted Critical
Publication of KR100253524B1 publication Critical patent/KR100253524B1/ko

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0895—Details of the current generators
    • H03L7/0898—Details of the current generators the source or sink current values being variable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

로크(lock) 상태로 될 때까지의 시간이 짧은 PLL(Phase Locked Loop; 위상 동기 루프) 회로 등을 제공하는 것을 목적으로 한다. 위상 비교기(20a)가 전압 제어 발진기(40)의 발진 주파수가 입력 신호의 주파수보다 낮은 것을 검출한 경우, 발진 주파수가 높다고 검출하기까지 주파수를 상승시키도록 루프 필터(30)를 충전하고, 발진 주파수가 입력 신호의 주파수보다 높은 것을 검출한 경우, 발진 주파수가 낮다고 검출하기까지 주파수를 하강시키도록 루프릴터(30)을 방전시키는 주파수를 동기시키는 회로(218∼254)와, 주파수의 조정 후에 전압 제어 발진기(40)의 발진 주파수와 입력 신호의 위상을 동기시키는 회로(202∼216)을 포함하고, 주파수의 조정 시간을 짧게 하였다.

Description

PLL 회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예에 의한 PLL 회로의 구성을 도시한 도면.

Claims (2)

  1. 위상 비교기와, 상기 위상 비교기의 출력에 의해 충·방전되는 루프 필터(loop filter)와, 상기 루프 필터의 전압에 따라 발진하고 출력을 상기 위상 비교기로 귀환시키는 전압 제어 발진기를 포함하는 PLL(Phase Locked Loop; 위상 동기 루프) 회로에 있어서, 상기 위상 비교기는, 상기 전압 제어 발진기의 발진 주파수가 입력 신호의 주파수보다 낮은 것을 검출할 경우 발진 주파수가 높다고 검출하기까지 주파수를 상승시키도록 루프 필터를 충전하고, 상기 전압 제어 발진기의 발진 주파수가 입력 신호의 주파수보다 높은 것을 검출한 경우 발진 주파수가 낮다고 검출하기까지 주파수를 하강시키도록 상기 루프 필터를 방전시키는 주파수 조정수단과; 주파수의 조정 후에 상기 전압 제어 발진기의 발진 주파수와 입력 신호의 위상을 맞추는 위상 조정 수단을 포함하는 것을 특징으로 하는 PLL회로.
  2. 위상 비교기와, 상기 위상 비교기의 출력에 의해 충·방전되는 루프 필터와, 상기 루프 필터의 전압에 따라 발진하고 출력을 상기 위상 비교기로 귀환시키는 전압 제어 발진기를 포함하는 PLL 회로에 있어서, 상기 루프 필터가, 자신의 콘덴서를 상기 전압 제어 발진기의 발진 주파수를 결정하는 전류에 따른 전류로 충·방전하는 제1의 충·방전 수단을 포함하고, 주파수 범위가 넓은 것을 특징으로 하는 PLL회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960058717A 1996-04-05 1996-11-28 Pll 회로 KR100253524B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP96-083802 1996-04-05
JP08380296A JP3695833B2 (ja) 1996-04-05 1996-04-05 Ｐｌｌ回路

Publications (2)

Publication Number Publication Date
KR970072708A true KR970072708A (ko) 1997-11-07
KR100253524B1 KR100253524B1 (ko) 2000-04-15

Family

ID=13812801

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960058717A KR100253524B1 (ko) 1996-04-05 1996-11-28 Pll 회로

Country Status (7)

Country Link
US (1) US5942926A (ko)
EP (1) EP0800274B1 (ko)
JP (1) JP3695833B2 (ko)
KR (1) KR100253524B1 (ko)
CN (1) CN1111956C (ko)
DE (1) DE69625328T2 (ko)
TW (1) TW395093B (ko)

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FR2768875B1 (fr) * 1997-09-23 2000-06-02 Sgs Thomson Microelectronics Detecteur de signaux radiofrequence pour carte a puce sans contact
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TWI647912B (zh) * 2018-03-26 2019-01-11 創意電子股份有限公司 模型建立方法
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Also Published As

Publication number Publication date
CN1111956C (zh) 2003-06-18
CN1162219A (zh) 1997-10-15
JP3695833B2 (ja) 2005-09-14
EP0800274B1 (en) 2002-12-11
JPH09275337A (ja) 1997-10-21
EP0800274A2 (en) 1997-10-08
KR100253524B1 (ko) 2000-04-15
DE69625328T2 (de) 2003-08-28
DE69625328D1 (de) 2003-01-23
EP0800274A3 (en) 1999-08-04
US5942926A (en) 1999-08-24
TW395093B (en) 2000-06-21

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