KR970030901A - 박막트랜지스터 제조방법 - Google Patents

박막트랜지스터 제조방법 Download PDF

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Publication number
KR970030901A
KR970030901A KR1019950039321A KR19950039321A KR970030901A KR 970030901 A KR970030901 A KR 970030901A KR 1019950039321 A KR1019950039321 A KR 1019950039321A KR 19950039321 A KR19950039321 A KR 19950039321A KR 970030901 A KR970030901 A KR 970030901A
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KR
South Korea
Prior art keywords
forming
polysilicon layer
thin film
film transistor
photoresist pattern
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Application number
KR1019950039321A
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English (en)
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KR0161924B1 (ko
Inventor
오길환
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구자홍
엘지전자 주식회사
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Publication date
Application filed by 구자홍, 엘지전자 주식회사 filed Critical 구자홍
Priority to KR1019950039321A priority Critical patent/KR0161924B1/ko
Publication of KR970030901A publication Critical patent/KR970030901A/ko
Application granted granted Critical
Publication of KR0161924B1 publication Critical patent/KR0161924B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78672Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Thin Film Transistor (AREA)

Abstract

본 발명은 박막트랜지스터 제조방법에 관한 것으로, 박막트랜지스터의 특성을 향상시키기 위한 것이다.
본 발명은 기판상에 폴리실리콘층을 형성하는 단계와, 상기 폴리실리콘층상에 활성층영역으로 정의하기 위한 포토레지스트패턴을 형성하는 단계, 상기 포토레지스트패턴을 마스크로 하여 상기 폴리실리콘층에 선택적으로 이온을 주입하는 단계, 상기 포토레지스트패턴을 제거하는 단계, 열산화공정을 행하여 게이트산화막을 형성하는 단계 및 상기 게이트산화막상에 게이트 전극을 형성하는 단계를 포함하여 이루어지는 박막트랜지스터 제조방법을 제공한다.

Description

박막트랜지스터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명에 의한 박막트랜지스터 제조방법을 도시한 공정순서도.
제5도는 본 발명의 박막트랜지스터의 특성을 나타낸 도면.

Claims (2)

  1. 기판상에 폴리실리콘층을 형성하는 단계와, 상기 폴리실리콘층상에 활성층영역으로 정의하기 위한 포토레지스트패턴을 형성하는 단계, 상기 포토레지스트패턴을 마스크로 하여 상기 폴리실리콘층에 선택적으로 이온을 주입하는 단계, 상기 포토레지스트패턴을 제거하는 단계, 열산화공정을 행하여 게이트산화막을 형성하는 단계 및 상기 게이트산화막상에 게이트 전극을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 박막트랜지스터 제조방법
  2. 제1항에 있어서, 상기 열산화공정에 의해 상기 이온이 주입된 폴리실리콘층 부분은 전부 산화막으로 되어 인접한 활성층간에 분리가 이루어지는 것을 특징으로 하는 박막트랜지스터 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950039321A 1995-11-02 1995-11-02 박막트랜지스터 제조방법 KR0161924B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950039321A KR0161924B1 (ko) 1995-11-02 1995-11-02 박막트랜지스터 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950039321A KR0161924B1 (ko) 1995-11-02 1995-11-02 박막트랜지스터 제조방법

Publications (2)

Publication Number Publication Date
KR970030901A true KR970030901A (ko) 1997-06-26
KR0161924B1 KR0161924B1 (ko) 1998-12-01

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Family Applications (1)

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KR1019950039321A KR0161924B1 (ko) 1995-11-02 1995-11-02 박막트랜지스터 제조방법

Country Status (1)

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KR (1) KR0161924B1 (ko)

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Publication number Publication date
KR0161924B1 (ko) 1998-12-01

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