KR970013412A - 반도체소자의 제조방법 - Google Patents

반도체소자의 제조방법 Download PDF

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KR970013412A
KR970013412A KR1019950024299A KR19950024299A KR970013412A KR 970013412 A KR970013412 A KR 970013412A KR 1019950024299 A KR1019950024299 A KR 1019950024299A KR 19950024299 A KR19950024299 A KR 19950024299A KR 970013412 A KR970013412 A KR 970013412A
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semiconductor device
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KR1019950024299A
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KR0172793B1 (ko
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노광명
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김주용
현대전자산업 주식회사
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Priority to KR1019950024299A priority Critical patent/KR0172793B1/ko
Priority to TW085109430A priority patent/TW371367B/zh
Priority to US08/692,622 priority patent/US5861334A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652Through-implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107Substrate region of field-effect devices
    • H01L29/1075Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7838Field effect transistors with field effect produced by an insulated gate without inversion channel, e.g. buried channel lateral MISFETs, normally-on lateral MISFETs, depletion-mode lateral MISFETs

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  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Spectroscopy & Molecular Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 버리드 채널 구조를 갖는 반도체 소자에 있어서, 버드리 채널 바로 밑 영역의 웰 농도를 높이기 위해 웰과 같은 도전형의 불순물을 이온주입하므로써, 반도체 소자의 숏 채널 특성을 향상시키고, MOSFET의 원할한 온/오프 특성을 얻을 수 있다.

Description

반도체소자의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 내지 제7도는 본 발명의 실시예에 의해 프로파일드 웰과 버리드 채널 구조를 갖는 PMOSFET 제조 단계를 도시한 단면도.

Claims (8)

  1. 제1도전형의 반도체기판에 고에너지 이온주입에 의한 제2도전형의 프로파일드 웰을 형성하는 단계와, 제2도전형의 불순물을 상기 웰 상측으로 이온주입 하는 단계와, 제1도전형 불순물을 상기 제2도전형 불순물이 주입된 영역내로 이온주입하여 버리드 채널을 형성하는 단계와, 상기 반도체기판 상부에 게이트 산화막과 게이트 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.
  2. 제1항에 있어서, 상기 제1도전형의 P형이고 제2도전형이 N형인 것을 특징으로 하는 반도체 소자의 제조방법.
  3. 제1항에 있어서, 상기 제2도전형 불순물을 상기 웰 상측으로 이온주입할 때 인(P)을 소오스로 하고, 3×1012도우스양과, 40KeV의 에너지에서 진행되는 것을 특징으로 하는 반도체 소자의 제조방법.
  4. 제1항에 있어서, 상기 버리드 채널은 BF2를 소오스로 하고, 8×1012의 도우스양과, 20KeV 에너지에서 형성되는 것을 특징으로 하는 반도체 소자의 제조방법.
  5. 제1도전형의 반도체기판에 고에너지 이온주입에 의한 제2도전형의 프로파일드 웰을 형성하는 단계와, 제1도전형의 불순물을 상기 웰로 이온주입하여 상기 웰 상측부에 버리드 채널을 형성하는 단계와, 제2도전형 불순물을 상기 웰로 주입하되 상기 버리드 채널 바로 밑 부분까지 주입되도록 하는 단계와, 상기 반도체기판 상부에 게이트 산화막과 게이트 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.
  6. 제5항에 있어서, 상기 제1도전형의 P형이고 제2도전형이 N형인 것을 특징으로 하는 반도체 소자의 제조방법.
  7. 제5항에 있어서, 상기 제2도전형 불순물을 상기 웰 상측으로 이온주입할 때 인(P)을 소오스로 하고, 3×1012도우스양과, 40KeV의 에너지에서 진행되는 것을 특징으로 하는 반도체 소자의 제조방법.
  8. 제5항에 있어서, 상기 버리드 채널은 BF2를 소오스로 하고, 8×1012의 도우스양과, 20KeV 에너지에서 형성되는 것을 특징으로 하는 반도체 소자의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950024299A 1995-08-07 1995-08-07 반도체소자의 제조방법 KR0172793B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019950024299A KR0172793B1 (ko) 1995-08-07 1995-08-07 반도체소자의 제조방법
TW085109430A TW371367B (en) 1995-08-07 1996-08-05 Method for fabricating semiconductor device
US08/692,622 US5861334A (en) 1995-08-07 1996-08-06 Method for fabricating semiconductor device having a buried channel

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KR1019950024299A KR0172793B1 (ko) 1995-08-07 1995-08-07 반도체소자의 제조방법

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KR970013412A true KR970013412A (ko) 1997-03-29
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TW371367B (en) 1999-10-01
KR0172793B1 (ko) 1999-02-01
US5861334A (en) 1999-01-19

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