KR970012145A - 데이타 프로세서와 그 작동 방법, 그 디버깅 작동 실행 방법 및 그 중단점 값 수정 방법 - Google Patents
데이타 프로세서와 그 작동 방법, 그 디버깅 작동 실행 방법 및 그 중단점 값 수정 방법 Download PDFInfo
- Publication number
- KR970012145A KR970012145A KR1019960036223A KR19960036223A KR970012145A KR 970012145 A KR970012145 A KR 970012145A KR 1019960036223 A KR1019960036223 A KR 1019960036223A KR 19960036223 A KR19960036223 A KR 19960036223A KR 970012145 A KR970012145 A KR 970012145A
- Authority
- KR
- South Korea
- Prior art keywords
- breakpoint
- value
- processing unit
- central processing
- processor
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3648—Software debugging using additional hardware
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3636—Software debugging by tracing the execution of the program
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Software Systems (AREA)
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
특정 디버그 모듈에서 데이타 프로세서의 작동이 필요없이 동시 작동을 실행하는 중앙처리 유니트(2)와 디버그 모듈(10), 코어(9)와 디버그 모듈(10)간의 데이타, 어드레스, 및 제어 정보의 통신을 위한 버스(25)의 이용은 디버그 모듈(10)이 중앙 처리 유니트(2)로 메모리 위치 및 내부 레지스터를 같이 억세스할 수 있게 한다. 디버그 모듈(10)과 중앙 처리 유니트(2) 모두 내부 레지스터 및 내부 레지스터를 같이 억세스 할 수 있는 능력을 갖지만, 중앙 처리 유니트(2)는 다수의 제어 레지스터(40)의 CSR(제8도)에서 디버그 레지스터에 금지 프로세서 기록(IPW) 비트가 설정될 때 다수의 중단점 레지스터(50)에 저장된 값을 수정하지 않을 수 있다. 상기 IPW 비트는 외부 개발 시스템(7)에 의해 제공된 명령에 의해서만 수정될 수 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 한 실시예에 따른 데이타 처리 시스템을 도시하는 블럭도,
제2도는 제1도의 데이타 처리 시스템의 디버그 모듈의 한 부분을 도시하는 블럭도,
제3도는 제2도의 디버그 모듈의 중단점을 도시하는 블럭도.
Claims (5)
- 내부 어드레스에 의해 식별된 메모리 회로 내의 메모리 위치와; 데이타 프로세서의 메모리 위치에 접근하기 위해 외부 요구를 처리하고, 메모리 위치의 억세스 작동을 초기화하기 위한 버스 요구 신호를 단정(asserting)하고, 버그 그랜트 신호의 수신에 따라 상기 메모리위치의 억세스 작동을 실행하는 디버그 모듈과; 상기 데이타 프로세서의 작동 제어용 중앙 처리 유니트로서, 제1파이프라인이 실행될 다수의 데이타 처리명령을 가리키는 파이프라인 작동 방법을 이용한 다수의 데이타 처리 명령을 실행하고, 상기 다수의 데이타 처리 명령이 실행될 때 상기 버스 요구 신호에 응답하여 버스 그랜트 신호를 선택적으로 단정(asserting)하는 중앙 처리 유니트와; 각각의 디버그 모듈, 중앙 처리 유니트 및 상기 메모리간의 정보 통신용 버스 수단으로서, 상기 버스 그랜트 신호가 단정될 때 상기 메모리 위치에서 상기 디버그 모듈과 저장된 데이타 값을 통신하는 버스 수단을 포함하는 것을 특징으로 하는 데이타 프로세서.
- 명령을 수신하여 외부 시스템으로부터 메모리 장치에 억세스하는 단계와; 어드레스를 수신하여 외부 개발 시스템으로부터 상기 메모리 장치의 메모리 위치에 억세스하는 단계와; 상기 명령을 디코딩하여 데이타 프로세서의 디버그 모듈의 제어 회로를 이용하는 상기 데이타 프로세서에 의해 실행될 기능을 결정하는 단계와; 사익 디버그 모듈의 제1의 어드레스 레지스터에 상기 어드레스를 저장하는 단계와; 상기 디버그 모듈의 제어 회로를 인에이블하여 제1의 논리 상태에서 버스 요구 신호를 생성하는 단계와; 현 다수의 파이프라인 명령이 실행되고 상기 버스 요구 신호가 상기 제1논리 상태에 있을 때 중앙 처리 유니트의 내부 명령 파이프라인을 스톨링(stalling)하는 단계와; 상기 중앙 처리 유니트를 인에이블하여 상기 중앙 처리 유니트의 내부 명령 파이프라인이 스톨링될 때 제2논리 상태에서 버스 그랜트 신호를 생성하는 단계와; 상기버스 그랜트 신호가 제2신호논리 상태일 때 상기 디버그 모듈의 제1어드레스 레지스터의 어드레스를 상기 메모리 장치에 제공하는 단계, 및; 상기 메모리 장치의 메모리위치에 억세스하여 상기 외부 개발 시스템에 의해 제공된 명령에 의해 특정된 기능을 실행하는 단계를 포함하는 것을 특징으로 하는 데이타 프로세서 작동방법.
- 다수의 데이타 처리 명령을 실행하기 위한 중앙 처리 유니트와; 중단점 값을 저장하기 위한 중단점 레지스터로서, 상기 중앙 처리 유니트와 연결되어 상기 중단점 값과 통신하는 중단점 레지스터, 및; 프로세서 금지값(inhibit value)을 저장하는 제1제어 레지스터로서, 상기 프로세서 금지값은 상기 중앙 처리 유니트가 상기 중단점 레지스터에 저장된 중단점 값을 수정하는 데이타 처리 명령의 실행을 선택적으로 금지하는 제1제어 레지스터를 포함하는 것을 특징으로 하는 데이타 프로세서.
- 중앙 처리 유니트를 제공하여 다수의 데이타 처리 명령을 실행하는 단계와; 중단점 값을 중단점 레지스터에 저장하는 단계로서, 상기 중단점 레지스터는 상기 중앙 처리 유니트에 연결되어 상기 중단점 값을 통신하는 단계와; 제1제어 레지스터의 프로세서 금지값을 저장하는 단계, 및; 상기 프로세서 금지값이 제1논리값일 때 상기 중앙 처리 유니트의 상기 중단점 레지스터에 저장된 중단점 값을 수정하는 데이타 처리 명령의 실행을 선택적으로 금지하는 단계를 포함하는 것을 특징으로 하는 데이타 프로세서의 디버깅 작동 실행 방법.
- 명령을 수신하여 외부 개발시스템으로부터 데이타 프로세서의 제1제어 레지스터에 프로세서 금지값을 저장하는 단계와; 상기 데이타 프로세서의 제1제어 레지스터에 상기 프로세서 금지값을 저장하는 단계와;제1중단점 레지스터에 제1중단점 값을 저장하는 단계와; 회로에 상기 프로세서 금지값을 제공하는 단계와; 상기중단점 회로를 인에이블하여 상기 데이타 처리 작동이 상기 데이타 프로세서에 의해 초기화될 때 상기 제1중단점 레지스터의 제1중단점 값을 수정하는 데이타 처리 작동의 실행을 금지하는 단계, 및; 상기 중단점 회로를 인에이블하여 상기 데이타 처리 작동이 데이타 프로세서 외부의 개발 시스템에 의해 초기화될 때 상기 제1중단점 레지스터의 제1중단점 값을 수정하는 데이타 처리 작동을 실행하는 단계를 포함하는 것을 특징으로 하는 데이타 프로세서의 중단점 값을 수정하는 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US52124995A | 1995-08-30 | 1995-08-30 | |
US521,249 | 1995-08-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970012145A true KR970012145A (ko) | 1997-03-29 |
KR100439781B1 KR100439781B1 (ko) | 2004-10-06 |
Family
ID=24076003
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960036223A KR100439781B1 (ko) | 1995-08-30 | 1996-08-29 | 데이터프로세서와그동작방법,그디버깅동작실행방법및그중단점값수정방법 |
Country Status (5)
Country | Link |
---|---|
US (2) | US6035422A (ko) |
EP (1) | EP0762280B1 (ko) |
JP (1) | JP3846939B2 (ko) |
KR (1) | KR100439781B1 (ko) |
DE (1) | DE69616917T2 (ko) |
Families Citing this family (137)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6205560B1 (en) * | 1996-02-27 | 2001-03-20 | Via-Cyrix, Inc. | Debug system allowing programmable selection of alternate debug mechanisms such as debug handler, SMI, or JTAG |
US6192427B1 (en) * | 1997-05-02 | 2001-02-20 | Texas Instruments Incorporated | Input/output buffer managed by sorted breakpoint hardware/software |
KR100230454B1 (ko) * | 1997-05-28 | 1999-11-15 | 윤종용 | 다중처리 시스템의 캐시메모리 검사방법 |
US6175913B1 (en) | 1997-09-12 | 2001-01-16 | Siemens Ag | Data processing unit with debug capabilities using a memory protection unit |
US6247119B1 (en) * | 1997-11-26 | 2001-06-12 | Texas Instruments Incorporated | Apparatus having a flattener for outputting aligned or unaligned information from an instruction execution pipeline |
EP0924619A3 (de) * | 1997-12-19 | 2004-01-07 | Infineon Technologies AG | Programmgesteuerte Einheit |
US6473727B1 (en) * | 1998-03-06 | 2002-10-29 | Lsi Logic Corporation | Processor development systems |
US6513108B1 (en) | 1998-06-29 | 2003-01-28 | Cisco Technology, Inc. | Programmable processing engine for efficiently processing transient data |
US6836838B1 (en) | 1998-06-29 | 2004-12-28 | Cisco Technology, Inc. | Architecture for a processor complex of an arrayed pipelined processing engine |
US6195739B1 (en) | 1998-06-29 | 2001-02-27 | Cisco Technology, Inc. | Method and apparatus for passing data among processor complex stages of a pipelined processing engine |
US6145123A (en) * | 1998-07-01 | 2000-11-07 | Advanced Micro Devices, Inc. | Trace on/off with breakpoint register |
JP2000099366A (ja) * | 1998-09-21 | 2000-04-07 | Fujitsu Ltd | 演算処理装置および演算処理装置のデバッグ方法 |
US6173386B1 (en) * | 1998-12-14 | 2001-01-09 | Cisco Technology, Inc. | Parallel processor with debug capability |
US6920562B1 (en) | 1998-12-18 | 2005-07-19 | Cisco Technology, Inc. | Tightly coupled software protocol decode with hardware data encryption |
US6567933B1 (en) * | 1999-02-19 | 2003-05-20 | Texas Instruments Incorporated | Emulation suspension mode with stop mode extension |
US6336191B1 (en) * | 1999-03-08 | 2002-01-01 | International Business Machines Corporation | Method and system for clock compensation in instruction level tracing in a symmetrical multi-processing system |
US6370660B1 (en) * | 1999-04-21 | 2002-04-09 | Advanced Micro Devices, Inc. | Apparatus and method for providing a wait for status change capability for a host computer system |
US6446221B1 (en) * | 1999-05-19 | 2002-09-03 | Arm Limited | Debug mechanism for data processing systems |
WO2000072152A1 (en) * | 1999-05-19 | 2000-11-30 | Koninklijke Philips Electronics N.V. | Data processor with a debug circuit |
US6343358B1 (en) | 1999-05-19 | 2002-01-29 | Arm Limited | Executing multiple debug instructions |
US6321329B1 (en) | 1999-05-19 | 2001-11-20 | Arm Limited | Executing debug instructions |
JP4335999B2 (ja) * | 1999-05-20 | 2009-09-30 | 株式会社ルネサステクノロジ | プロセッサ内蔵半導体集積回路装置 |
JP2001034504A (ja) * | 1999-07-19 | 2001-02-09 | Mitsubishi Electric Corp | ソースレベルデバッガ |
US6584590B1 (en) * | 1999-08-13 | 2003-06-24 | Lucent Technologies Inc. | JTAG port-sharing device |
US6918065B1 (en) | 1999-10-01 | 2005-07-12 | Hitachi, Ltd. | Method for compressing and decompressing trace information |
US6732307B1 (en) * | 1999-10-01 | 2004-05-04 | Hitachi, Ltd. | Apparatus and method for storing trace information |
US6684348B1 (en) | 1999-10-01 | 2004-01-27 | Hitachi, Ltd. | Circuit for processing trace information |
US6529983B1 (en) | 1999-11-03 | 2003-03-04 | Cisco Technology, Inc. | Group and virtual locking mechanism for inter processor synchronization |
US6615368B1 (en) * | 2000-01-04 | 2003-09-02 | National Semiconductor Corporation | System and method for debugging highly integrated data processors |
JP2001195281A (ja) * | 2000-01-07 | 2001-07-19 | Sony Corp | システム監視装置 |
US6892237B1 (en) * | 2000-03-28 | 2005-05-10 | Cisco Technology, Inc. | Method and apparatus for high-speed parsing of network messages |
JP3629181B2 (ja) | 2000-03-28 | 2005-03-16 | Necマイクロシステム株式会社 | プログラム開発支援装置 |
US6505269B1 (en) | 2000-05-16 | 2003-01-07 | Cisco Technology, Inc. | Dynamic addressing mapping to eliminate memory resource contention in a symmetric multiprocessor system |
US6857092B1 (en) | 2000-08-17 | 2005-02-15 | Xilinx, Inc. | Method and apparatus to facilitate self-testing of a system on a chip |
US8176296B2 (en) | 2000-10-26 | 2012-05-08 | Cypress Semiconductor Corporation | Programmable microcontroller architecture |
US8160864B1 (en) | 2000-10-26 | 2012-04-17 | Cypress Semiconductor Corporation | In-circuit emulator and pod synchronized boot |
US6724220B1 (en) | 2000-10-26 | 2004-04-20 | Cyress Semiconductor Corporation | Programmable microcontroller architecture (mixed analog/digital) |
US6823282B1 (en) * | 2000-10-26 | 2004-11-23 | Cypress Semiconductor Corporation | Test architecture for microcontroller providing for a serial communication interface |
US8149048B1 (en) | 2000-10-26 | 2012-04-03 | Cypress Semiconductor Corporation | Apparatus and method for programmable power management in a programmable analog circuit block |
US8103496B1 (en) | 2000-10-26 | 2012-01-24 | Cypress Semicondutor Corporation | Breakpoint control in an in-circuit emulation system |
US7765095B1 (en) | 2000-10-26 | 2010-07-27 | Cypress Semiconductor Corporation | Conditional branching in an in-circuit emulation system |
US6985980B1 (en) | 2000-11-03 | 2006-01-10 | Xilinx, Inc. | Diagnostic scheme for programmable logic in a system on a chip |
US6757846B1 (en) * | 2000-11-06 | 2004-06-29 | Xilinx, Inc. | Method and apparatus for multi-bus breakpoint stepping |
US6751751B1 (en) | 2000-11-06 | 2004-06-15 | Xilinx, Inc. | Universal multi-bus breakpoint unit for a configurable system-on-chip |
US6484273B1 (en) * | 2000-11-29 | 2002-11-19 | Lsi Logic Corporation | Integrated EJTAG external bus interface |
US6986026B2 (en) * | 2000-12-15 | 2006-01-10 | Intel Corporation | Single-step processing and selecting debugging modes |
US6718539B1 (en) * | 2000-12-22 | 2004-04-06 | Lsi Logic Corporation | Interrupt handling mechanism in translator from one instruction set to another |
US6915416B2 (en) * | 2000-12-28 | 2005-07-05 | Texas Instruments Incorporated | Apparatus and method for microcontroller debugging |
US7069545B2 (en) * | 2000-12-29 | 2006-06-27 | Intel Corporation | Quantization and compression for computation reuse |
US7093236B2 (en) * | 2001-02-01 | 2006-08-15 | Arm Limited | Tracing out-of-order data |
US7093108B2 (en) * | 2001-02-01 | 2006-08-15 | Arm Limited | Apparatus and method for efficiently incorporating instruction set information with instruction addresses |
US6760864B2 (en) * | 2001-02-21 | 2004-07-06 | Freescale Semiconductor, Inc. | Data processing system with on-chip FIFO for storing debug information and method therefor |
US6834364B2 (en) * | 2001-04-19 | 2004-12-21 | Agilent Technologies, Inc. | Algorithmically programmable memory tester with breakpoint trigger, error jamming and 'scope mode that memorizes target sequences |
JP2003085001A (ja) * | 2001-09-12 | 2003-03-20 | Toshiba Corp | ソース・コード・デバッガ、デバッグ方法及びデバッグプログラム |
US7406674B1 (en) | 2001-10-24 | 2008-07-29 | Cypress Semiconductor Corporation | Method and apparatus for generating microcontroller configuration information |
US8078970B1 (en) | 2001-11-09 | 2011-12-13 | Cypress Semiconductor Corporation | Graphical user interface with user-selectable list-box |
US8042093B1 (en) | 2001-11-15 | 2011-10-18 | Cypress Semiconductor Corporation | System providing automatic source code generation for personalization and parameterization of user modules |
US7774190B1 (en) | 2001-11-19 | 2010-08-10 | Cypress Semiconductor Corporation | Sleep and stall in an in-circuit emulation system |
US6971004B1 (en) | 2001-11-19 | 2005-11-29 | Cypress Semiconductor Corp. | System and method of dynamically reconfiguring a programmable integrated circuit |
US7844437B1 (en) | 2001-11-19 | 2010-11-30 | Cypress Semiconductor Corporation | System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit |
US7770113B1 (en) | 2001-11-19 | 2010-08-03 | Cypress Semiconductor Corporation | System and method for dynamically generating a configuration datasheet |
US8069405B1 (en) | 2001-11-19 | 2011-11-29 | Cypress Semiconductor Corporation | User interface for efficiently browsing an electronic document using data-driven tabs |
US7382637B1 (en) * | 2002-02-01 | 2008-06-03 | Netlogic Microsystems, Inc. | Block-writable content addressable memory device |
US8103497B1 (en) | 2002-03-28 | 2012-01-24 | Cypress Semiconductor Corporation | External interface for event architecture |
US7308608B1 (en) | 2002-05-01 | 2007-12-11 | Cypress Semiconductor Corporation | Reconfigurable testing system and method |
US20040078630A1 (en) * | 2002-06-28 | 2004-04-22 | Niles Ronald Steven | System and method for protecting data |
US7107489B2 (en) * | 2002-07-25 | 2006-09-12 | Freescale Semiconductor, Inc. | Method and apparatus for debugging a data processing system |
US20040019828A1 (en) * | 2002-07-25 | 2004-01-29 | Gergen Joseph P. | Method and apparatus for debugging a data processing system |
US7761845B1 (en) | 2002-09-09 | 2010-07-20 | Cypress Semiconductor Corporation | Method for parameterizing a user module |
US6889311B2 (en) * | 2002-11-22 | 2005-05-03 | Texas Instruments Incorporated | Pipeline stage single cycle sliding alignment correction of memory read data with integrated data reordering for load and store instructions |
US20040103399A1 (en) * | 2002-11-22 | 2004-05-27 | Manisha Agarwala | Data trace compression map |
US6996735B2 (en) * | 2002-11-22 | 2006-02-07 | Texas Instruments Incorporated | Apparatus for alignment of data collected from multiple pipe stages with heterogeneous retention policies in an unprotected pipeline |
US7299386B2 (en) * | 2002-12-17 | 2007-11-20 | Texas Instruments Incorporated | Apparatus and method for detecting address characteristics for use with a trigger generation unit in a target processor |
US7574585B1 (en) | 2003-01-31 | 2009-08-11 | Zilog, Inc. | Implementing software breakpoints and debugger therefor |
US6798713B1 (en) * | 2003-01-31 | 2004-09-28 | Zilog, Inc. | Implementing software breakpoints |
US7243214B2 (en) * | 2003-04-21 | 2007-07-10 | Intel Corporation | Stall optimization for an in-order, multi-stage processor pipeline which analyzes current and next instructions to determine if a stall is necessary |
TW200511111A (en) * | 2003-07-30 | 2005-03-16 | Koninkl Philips Electronics Nv | Microcontroller with an interrupt structure having programmable priority levels with each priority level associated with a different register set |
US20070294583A1 (en) * | 2004-02-09 | 2007-12-20 | Continental Teves Ag & Co. Ohg | Device and Method for Analyzing Embedded Systems for Safety-Critical Computer Systems in Motor Vehicles |
US7313729B2 (en) * | 2004-02-20 | 2007-12-25 | Winbond Electronics Corp. | Low-cost debugging system with a ROM or RAM emulator |
US7295049B1 (en) | 2004-03-25 | 2007-11-13 | Cypress Semiconductor Corporation | Method and circuit for rapid alignment of signals |
US7734797B2 (en) * | 2004-03-29 | 2010-06-08 | Marvell International Ltd. | Inter-processor communication link with manageability port |
JP4409349B2 (ja) * | 2004-04-27 | 2010-02-03 | Okiセミコンダクタ株式会社 | デバッグ回路およびデバッグ制御方法 |
US20050268195A1 (en) * | 2004-04-29 | 2005-12-01 | Lund Morten W | Apparatus and method for improving emulation speed of high-level languages in on-chip emulation systems |
US7334161B2 (en) * | 2004-04-30 | 2008-02-19 | Arm Limited | Breakpoint logic unit, debug logic and breakpoint method for a data processing apparatus |
US8286125B2 (en) | 2004-08-13 | 2012-10-09 | Cypress Semiconductor Corporation | Model for a hardware device-independent method of defining embedded firmware for programmable systems |
US8069436B2 (en) | 2004-08-13 | 2011-11-29 | Cypress Semiconductor Corporation | Providing hardware independence to automate code generation of processing device firmware |
US7587635B2 (en) * | 2004-10-04 | 2009-09-08 | Cisco Technology, Inc. | Method of debugging “active” unit using “non-intrusive source-level debugger” on “standby” unit of high availability system |
WO2006079962A2 (en) * | 2005-01-28 | 2006-08-03 | Nxp B.V. | Means and method for debugging |
US7332976B1 (en) | 2005-02-04 | 2008-02-19 | Cypress Semiconductor Corporation | Poly-phase frequency synthesis oscillator |
US7237149B2 (en) * | 2005-02-25 | 2007-06-26 | Freescale Semiconductor, Inc. | Method and apparatus for qualifying debug operation using source information |
US7400183B1 (en) | 2005-05-05 | 2008-07-15 | Cypress Semiconductor Corporation | Voltage controlled oscillator delay cell and method |
US7917914B2 (en) * | 2005-06-09 | 2011-03-29 | Whirlpool Corporation | Event notification system for an appliance |
US20070162158A1 (en) * | 2005-06-09 | 2007-07-12 | Whirlpool Corporation | Software architecture system and method for operating an appliance utilizing configurable notification messages |
US20080137670A1 (en) * | 2005-06-09 | 2008-06-12 | Whirlpool Corporation | Network System with Message Binding for Appliances |
US7921429B2 (en) * | 2005-06-09 | 2011-04-05 | Whirlpool Corporation | Data acquisition method with event notification for an appliance |
CA2611527A1 (en) * | 2005-06-09 | 2006-12-21 | Whirlpool Corporation | Software architecture system and method for communication with, and management of, at least one component within a household appliance |
US7813831B2 (en) * | 2005-06-09 | 2010-10-12 | Whirlpool Corporation | Software architecture system and method for operating an appliance in multiple operating modes |
US8089461B2 (en) | 2005-06-23 | 2012-01-03 | Cypress Semiconductor Corporation | Touch wake for electronic devices |
US20070198816A1 (en) * | 2005-11-10 | 2007-08-23 | Chuan-Po Ling | Emulation system for a single-chip multiple-microcontroller and emulation method thereof |
FR2894694A1 (fr) * | 2005-12-09 | 2007-06-15 | St Microelectronics Sa | Procede et dispositif de mise au point d'un programme execute par un processeur multitache |
US8085067B1 (en) | 2005-12-21 | 2011-12-27 | Cypress Semiconductor Corporation | Differential-to-single ended signal converter circuit and method |
US8010774B2 (en) * | 2006-03-13 | 2011-08-30 | Arm Limited | Breakpointing on register access events or I/O port access events |
US8067948B2 (en) | 2006-03-27 | 2011-11-29 | Cypress Semiconductor Corporation | Input/output multiplexer bus |
US7979839B2 (en) * | 2006-08-23 | 2011-07-12 | Wolf William M | Method for employing the computer in the creative act of programming |
US7610517B2 (en) * | 2006-09-14 | 2009-10-27 | Innovasic, Inc. | Microprocessor with trace functionality |
US7707459B2 (en) | 2007-03-08 | 2010-04-27 | Whirlpool Corporation | Embedded systems debugging |
US7908516B2 (en) * | 2007-03-27 | 2011-03-15 | Microchip Technology Incorporated | Low power mode fault recovery method, system and apparatus |
US9564902B2 (en) | 2007-04-17 | 2017-02-07 | Cypress Semiconductor Corporation | Dynamically configurable and re-configurable data path |
US8026739B2 (en) * | 2007-04-17 | 2011-09-27 | Cypress Semiconductor Corporation | System level interconnect with programmable switching |
US8130025B2 (en) * | 2007-04-17 | 2012-03-06 | Cypress Semiconductor Corporation | Numerical band gap |
US7737724B2 (en) | 2007-04-17 | 2010-06-15 | Cypress Semiconductor Corporation | Universal digital block interconnection and channel routing |
US8092083B2 (en) | 2007-04-17 | 2012-01-10 | Cypress Semiconductor Corporation | Temperature sensor with digital bandgap |
US8040266B2 (en) | 2007-04-17 | 2011-10-18 | Cypress Semiconductor Corporation | Programmable sigma-delta analog-to-digital converter |
US8516025B2 (en) | 2007-04-17 | 2013-08-20 | Cypress Semiconductor Corporation | Clock driven dynamic datapath chaining |
US9720805B1 (en) | 2007-04-25 | 2017-08-01 | Cypress Semiconductor Corporation | System and method for controlling a target device |
US8065653B1 (en) | 2007-04-25 | 2011-11-22 | Cypress Semiconductor Corporation | Configuration of programmable IC design elements |
US8266575B1 (en) | 2007-04-25 | 2012-09-11 | Cypress Semiconductor Corporation | Systems and methods for dynamically reconfiguring a programmable system on a chip |
US7783865B2 (en) * | 2007-08-01 | 2010-08-24 | International Business Machines Corporation | Conditional data watchpoint management |
US8049569B1 (en) | 2007-09-05 | 2011-11-01 | Cypress Semiconductor Corporation | Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes |
US8407457B2 (en) * | 2007-09-28 | 2013-03-26 | Freescale Semiconductor, Inc. | System and method for monitoring debug events |
US8042002B2 (en) * | 2008-01-18 | 2011-10-18 | Freescale Semiconductor, Inc. | Method and apparatus for handling shared hardware and software debug resource events in a data processing system |
US7870430B2 (en) * | 2008-02-29 | 2011-01-11 | Freescale Semiconductor, Inc. | Method and apparatus for sharing debug resources |
US9448964B2 (en) | 2009-05-04 | 2016-09-20 | Cypress Semiconductor Corporation | Autonomous control in a programmable system |
US8661302B2 (en) * | 2010-11-17 | 2014-02-25 | Advanced Micro Devices, Inc. | Enhanced debug/test capability to a core reset process |
US9053233B2 (en) * | 2011-08-15 | 2015-06-09 | Freescale Semiconductor, Inc. | Method and device for controlling debug event resources |
GB2504772A (en) | 2012-08-10 | 2014-02-12 | Ibm | Coprocessor providing service address space for diagnostics collection |
US9645870B2 (en) | 2013-06-27 | 2017-05-09 | Atmel Corporation | System for debugging DMA system data transfer |
US9256399B2 (en) * | 2013-06-27 | 2016-02-09 | Atmel Corporation | Breaking program execution on events |
US9830245B2 (en) | 2013-06-27 | 2017-11-28 | Atmel Corporation | Tracing events in an autonomous event system |
CN107346282B (zh) | 2016-05-04 | 2024-03-12 | 世意法(北京)半导体研发有限责任公司 | 用于微处理器的调试支持单元 |
KR20180073300A (ko) * | 2016-12-22 | 2018-07-02 | 삼성전자주식회사 | 스캔 데이터 컨트롤 장치 및 이를 갖는 전자 시스템 |
US11256605B2 (en) | 2017-10-19 | 2022-02-22 | Samsung Electronics Co., Ltd. | Nonvolatile memory device |
KR102396448B1 (ko) * | 2017-10-19 | 2022-05-11 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 동작 방법 |
US11055416B2 (en) * | 2017-10-24 | 2021-07-06 | Micro Focus Llc | Detecting vulnerabilities in applications during execution |
JP7378254B2 (ja) * | 2019-09-19 | 2023-11-13 | キヤノン株式会社 | マルチプロセッサデバイス |
CN112540888B (zh) * | 2020-12-18 | 2022-08-12 | 清华大学 | 面向大规模可重构处理单元阵列的调试方法及装置 |
CN114510432B (zh) * | 2022-04-20 | 2022-07-12 | 苏州浪潮智能科技有限公司 | 一种寄存器调试平台和调试方法 |
Family Cites Families (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3937938A (en) * | 1974-06-19 | 1976-02-10 | Action Communication Systems, Inc. | Method and apparatus for assisting in debugging of a digital computer program |
US4080650A (en) * | 1976-07-28 | 1978-03-21 | Bell Telephone Laboratories, Incorporated | Facilitating return from an on-line debugging program to a target program breakpoint |
US4338660A (en) * | 1979-04-13 | 1982-07-06 | Relational Memory Systems, Inc. | Relational break signal generating device |
US4675646A (en) * | 1983-09-29 | 1987-06-23 | Tandem Computers Incorporated | RAM based multiple breakpoint logic |
US4635193A (en) * | 1984-06-27 | 1987-01-06 | Motorola, Inc. | Data processor having selective breakpoint capability with minimal overhead |
US5165027A (en) * | 1986-01-24 | 1992-11-17 | Intel Corporation | Microprocessor breakpoint apparatus |
JPH06103472B2 (ja) * | 1986-10-29 | 1994-12-14 | 日本電気株式会社 | デバツグ用マイクロプロセツサ |
US5132971A (en) * | 1987-02-06 | 1992-07-21 | Anritsu Corporation | In-circuit emulator |
US5179696A (en) * | 1987-07-24 | 1993-01-12 | Nec Corporation | Generator detecting internal and external ready signals for generating a bus cycle end signal for microprocessor debugging operation |
JPS6481046A (en) * | 1987-09-22 | 1989-03-27 | Nec Corp | Microprocessor unit incorporating debugging device |
US5084814A (en) * | 1987-10-30 | 1992-01-28 | Motorola, Inc. | Data processor with development support features |
US5129078A (en) * | 1988-08-19 | 1992-07-07 | Groves Stanley E | Dedicated service processor with inter-channel communication features |
DE68925615T2 (de) * | 1988-11-10 | 1996-09-12 | Motorola Inc | Digitalrechnersystem mit Niederstromverbrauchmodus |
US5053949A (en) * | 1989-04-03 | 1991-10-01 | Motorola, Inc. | No-chip debug peripheral which uses externally provided instructions to control a core processing unit |
US5448744A (en) * | 1989-11-06 | 1995-09-05 | Motorola, Inc. | Integrated circuit microprocessor with programmable chip select logic |
JPH03248244A (ja) * | 1990-02-27 | 1991-11-06 | Toshiba Corp | キャッシュメモリを備えたプロセッサ |
JP2526690B2 (ja) * | 1990-02-27 | 1996-08-21 | 三菱電機株式会社 | プログラマブルコントロ―ラの制御方法 |
US5581695A (en) * | 1990-05-09 | 1996-12-03 | Applied Microsystems Corporation | Source-level run-time software code debugging instrument |
US5410685A (en) * | 1990-06-12 | 1995-04-25 | Regents Of The University Of Michigan | Non-intrinsive method and system for recovering the state of a computer system and non-intrusive debugging method and system utilizing same |
US5204864A (en) * | 1990-08-16 | 1993-04-20 | Westinghouse Electric Corp. | Multiprocessor bus debugger |
JP2672711B2 (ja) * | 1991-02-01 | 1997-11-05 | ディジタル イクイップメント コーポレイション | コンピュータプログラムをテストし、デバッグする方法 |
US5321828A (en) * | 1991-06-07 | 1994-06-14 | Step Engineering | High speed microcomputer in-circuit emulator |
US5317711A (en) * | 1991-06-14 | 1994-05-31 | Integrated Device Technology, Inc. | Structure and method for monitoring an internal cache |
GB2266606B (en) * | 1992-04-27 | 1996-02-14 | Intel Corp | A microprocessor with an external command mode |
US5491793A (en) * | 1992-07-31 | 1996-02-13 | Fujitsu Limited | Debug support in a processor chip |
US5359608A (en) * | 1992-11-24 | 1994-10-25 | Amdahl Corporation | Apparatus for activation and deactivation of instruction tracing through use of conditional trace field in branch instructions |
DE4302902A1 (de) * | 1993-02-02 | 1994-08-04 | Frederic Dedek | Mikroprozessor mit boolscher Verknüpfungslogik |
EP0636976B1 (en) * | 1993-07-28 | 1998-12-30 | Koninklijke Philips Electronics N.V. | Microcontroller provided with hardware for supporting debugging as based on boundary scan standard-type extensions |
US5640542A (en) * | 1993-10-29 | 1997-06-17 | Intel Corporation | On-chip in-circuit-emulator memory mapping and breakpoint register modules |
US5828825A (en) * | 1993-12-22 | 1998-10-27 | Intel Corporation | Method and apparatus for pseudo-direct access to embedded memories of a micro-controller integrated circuit via the IEEE test access port |
US5488688A (en) * | 1994-03-30 | 1996-01-30 | Motorola, Inc. | Data processor with real-time diagnostic capability |
US5530804A (en) * | 1994-05-16 | 1996-06-25 | Motorola, Inc. | Superscalar processor with plural pipelined execution units each unit selectively having both normal and debug modes |
US5537536A (en) * | 1994-06-21 | 1996-07-16 | Intel Corporation | Apparatus and method for debugging electronic components through an in-circuit emulator |
US5694589A (en) * | 1995-06-13 | 1997-12-02 | Intel Corporation | Instruction breakpoint detection apparatus for use in an out-of-order microprocessor |
US5621886A (en) * | 1995-06-19 | 1997-04-15 | Intel Corporation | Method and apparatus for providing efficient software debugging |
US5740413A (en) * | 1995-06-19 | 1998-04-14 | Intel Corporation | Method and apparatus for providing address breakpoints, branch breakpoints, and single stepping |
US5680620A (en) * | 1995-06-30 | 1997-10-21 | Dell Usa, L.P. | System and method for detecting access to a peripheral device using a debug register |
-
1996
- 1996-08-22 EP EP96113471A patent/EP0762280B1/en not_active Expired - Lifetime
- 1996-08-22 DE DE69616917T patent/DE69616917T2/de not_active Expired - Fee Related
- 1996-08-22 JP JP23987896A patent/JP3846939B2/ja not_active Expired - Fee Related
- 1996-08-29 KR KR1019960036223A patent/KR100439781B1/ko not_active IP Right Cessation
-
1997
- 1997-05-15 US US08/857,006 patent/US6035422A/en not_active Expired - Lifetime
- 1997-10-06 US US08/944,655 patent/US6026501A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69616917D1 (de) | 2001-12-20 |
DE69616917T2 (de) | 2002-06-06 |
US6035422A (en) | 2000-03-07 |
JPH09218802A (ja) | 1997-08-19 |
KR100439781B1 (ko) | 2004-10-06 |
EP0762280B1 (en) | 2001-11-14 |
US6026501A (en) | 2000-02-15 |
EP0762280A1 (en) | 1997-03-12 |
JP3846939B2 (ja) | 2006-11-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR970012145A (ko) | 데이타 프로세서와 그 작동 방법, 그 디버깅 작동 실행 방법 및 그 중단점 값 수정 방법 | |
JP5197571B2 (ja) | マルチポート・メモリ・デバイスにおけるインターポート通信 | |
US5561761A (en) | Central processing unit data entering and interrogating device and method therefor | |
KR930018378A (ko) | 캐쉬 메모리 시스템의 성능최적화 방법 및 장치 | |
US6959367B2 (en) | System having read-modify-write unit | |
KR900016866A (ko) | 데이타 처리 시스템 | |
JP2003150574A (ja) | マイクロコンピュータ | |
JP3226055B2 (ja) | 情報処理装置 | |
JP4642531B2 (ja) | データ要求のアービトレーション | |
US7689864B2 (en) | Processor comprising an integrated debugging interface controlled by the processing unit of the processor | |
JPS6074059A (ja) | 記憶装置アクセス制御方式 | |
JPH02281341A (ja) | デバッグ時のライトデータ確認方法 | |
KR100217743B1 (ko) | 공유메모리 접속장치 및 그 접속방법 | |
JP2520158B2 (ja) | ディジタルシグナルプロセッサのデバッグ方式 | |
JP2000029508A (ja) | プログラマブルコントローラ | |
US20020147894A1 (en) | Program-controlled unit | |
JP2632859B2 (ja) | メモリアクセス制御回路 | |
JP3006487B2 (ja) | エミュレーション装置 | |
JPS5834856B2 (ja) | キオクセイギヨソウチ | |
JPH0635747A (ja) | デバッグ支援装置 | |
JP2654105B2 (ja) | マイクロプロセッサ | |
KR950033821A (ko) | 트레이스장치 및 이것을 사용한 에뮬레이터 | |
JPS62251857A (ja) | メモリ制御方式 | |
JPS60193046A (ja) | 命令例外検出方式 | |
JPS6247766A (ja) | マルチ計算機システムの入出力制御装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20130624 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20140624 Year of fee payment: 11 |
|
LAPS | Lapse due to unpaid annual fee |