KR960043294A - 박막트랜지스터 제조방법 - Google Patents
박막트랜지스터 제조방법 Download PDFInfo
- Publication number
- KR960043294A KR960043294A KR1019950012626A KR19950012626A KR960043294A KR 960043294 A KR960043294 A KR 960043294A KR 1019950012626 A KR1019950012626 A KR 1019950012626A KR 19950012626 A KR19950012626 A KR 19950012626A KR 960043294 A KR960043294 A KR 960043294A
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- South Korea
- Prior art keywords
- forming
- layer
- polysilicon
- doped region
- active layer
- Prior art date
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 5
- 239000010409 thin film Substances 0.000 title claims abstract 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 14
- 229920005591 polysilicon Polymers 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 8
- 239000010408 film Substances 0.000 claims abstract 8
- 239000000758 substrate Substances 0.000 claims abstract 4
- 238000005468 ion implantation Methods 0.000 claims abstract 3
- 238000005530 etching Methods 0.000 claims abstract 2
- 150000004767 nitrides Chemical class 0.000 claims 2
- 238000000151 deposition Methods 0.000 claims 1
- 238000002347 injection Methods 0.000 claims 1
- 239000007924 injection Substances 0.000 claims 1
- 150000002500 ions Chemical class 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
Abstract
본 발명은 박막트랜지스터 제조방법에 관한 것으로, 활성층 형성공정의 안정성을 기할 수 있고, 소자특성을 향상시킬 수 있도록 하기 위한 것이다.
본 발명은 기판상에 폴리실리콘층을 형성하는 단계와, 상기 폴리실리콘층의 소정 영역을 선택적으로 얇게 만들어 활성층을 형성하는 단계, 상기 폴리실리콘 활성층상에 게이트산화막을 형성하는 단계, 상기 폴리실리콘 활성층의 두께가 얇은 영역의 게이트 산화막 상부에 게이트전극을 형성하는 단계, 상기 게이트 전극을 마스크로 하여 상기 폴리실리콘 활성층에 이온주입을 행하여 저농도 도핑영역과 그레이디드 도핑영역 및 고농도 도핑영역을 동시에 형성하는 단계, 기판 전면에 절연층을 형성하는 단계, 상기 절연층을 선택적으로 식각하여 상기 고농도 도핑영역의 소정부분을 노충시키는 콘택 개구부를 형성하는 단계, 및 상기 절연층상에 상기 콘택 개구부를 통해 상기 고농도 도핑영역과 접속되는 전극을 형성하는 단계로 이루어지는 박막트랜지스터 제조방법을 제공한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 의한 폴리실리콘 TFT 제조방법을 도시한 공정순서도.
Claims (4)
- 기판상에 폴리실리콘층을 형성하는 단계와, 상기 폴리실리콘층의 소정 영역을 선택적으로 얇게 만들어 활성층을 형성하는 단계, 상기 폴리실리콘 활성층상에 게이트산화막을 형성하는 단계, 상기 폴리실리콘 활성층의 두께가 얇은 영역의 게이트 산화막 상부에 게이트전극을 형성하는 단계, 상기 게이트전극을 마스크로 하여 상기 폴리실리콘 활성층에 이온주입을 행하여 저농도 도핑영역과 그레이디드 도핑영역 및 고농도 도핑영역을 동시에 형성하는 단계, 기판 전면에 절연층을 형성하는 단계, 상기 절연층을 선택적으로 식각하여 상기 고농도 도핑영역의 소정부분을 노출시키는 콘택 개구부를 형성하는 단계, 및 상기 절연층상에 상기 콘택 개구부를 통해 상기 고농도 도핑영역과 접속되는 전극을 형성하는 단계로 이루어지는 것을 특징으로 하는 박막트랜지스터 제조방밥.
- 제1항에 있어서, 상기 폴리실리콘층의 소정 영역을 선택적으로 얇게 만드는 단계는 상기 폴리실리콘층상에 산화막과 질화막을 연속 증착하는 공정, 상기 질화막 및 산화막을 선택적으로 제거하여 상기 폴리실리콘층의 소정부분을 노출시키는 공정, 국부산화공정을 행하여 상기 노출된 폴리실리콘층 부위에 산화막을 형성하는 공정, 상기 질화막 및 산화막을 제거하는 공정을 차례로 실시하여 행하는 것을 특징으로 하는 박막트랜지스터 제조방법.
- 제1항에 있어서, 상기 이온주입공정은 투사범위를 기판과 활성층의 계면에 맞춰 행하는 것을 특징으로 하는 박막트랜지스터 제조방법.
- 제1항에 있어서, 상기 이온주입공정은 주입에너지를 150eV로, 도우즈량을 1015/㎤ 정도로 하여 행하는 것을 특징으로 하는 박막트랜지스터 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950012626A KR0166888B1 (ko) | 1995-05-19 | 1995-05-19 | 박막트랜지스터 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950012626A KR0166888B1 (ko) | 1995-05-19 | 1995-05-19 | 박막트랜지스터 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960043294A true KR960043294A (ko) | 1996-12-23 |
KR0166888B1 KR0166888B1 (ko) | 1999-01-15 |
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ID=19414971
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019950012626A KR0166888B1 (ko) | 1995-05-19 | 1995-05-19 | 박막트랜지스터 제조방법 |
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KR (1) | KR0166888B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6656810B1 (en) | 1998-10-30 | 2003-12-02 | Sharp Kabushiki Kaisha | Semiconductor device capable of reducing dispersion in electrical characteristics and operating at high speed and method for fabricating the same |
-
1995
- 1995-05-19 KR KR1019950012626A patent/KR0166888B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6656810B1 (en) | 1998-10-30 | 2003-12-02 | Sharp Kabushiki Kaisha | Semiconductor device capable of reducing dispersion in electrical characteristics and operating at high speed and method for fabricating the same |
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Publication number | Publication date |
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KR0166888B1 (ko) | 1999-01-15 |
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