KR970030499A - 반도체 소자의 제조방법 - Google Patents

반도체 소자의 제조방법 Download PDF

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Publication number
KR970030499A
KR970030499A KR1019950043302A KR19950043302A KR970030499A KR 970030499 A KR970030499 A KR 970030499A KR 1019950043302 A KR1019950043302 A KR 1019950043302A KR 19950043302 A KR19950043302 A KR 19950043302A KR 970030499 A KR970030499 A KR 970030499A
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South Korea
Prior art keywords
oxide film
forming
region
field oxide
polysilicon layer
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KR1019950043302A
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English (en)
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KR0156158B1 (ko
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송현욱
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문정환
엘지반도체 주식회사
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Priority to KR1019950043302A priority Critical patent/KR0156158B1/ko
Publication of KR970030499A publication Critical patent/KR970030499A/ko
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Publication of KR0156158B1 publication Critical patent/KR0156158B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Acyclic And Carbocyclic Compounds In Medicinal Compositions (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 발명은 반도체 소자에 관한 것으로, 특히 MOS 트랜지스터의 소오스/드레인 영역을 필드산화막의 일부를 제거하여 소자격리영역상에 형성하여 고집적화에 적당하도록 한 반도체 소자의 제조방법에 관한 것이다.
상기와 같은 본 발명의 반도체 소자의 제조방법은 제1도전형의 반도제 기판상에 액티브 마스크를 사용하여 활성영역을 패터닝하고 소자격리영역에 필드산화막을 형성하는 공정과, 상기 활성영역에 문턱전압을 조절하기위한 불순물 이온주입공정을 실시하고 전면에 폴리실리콘층과 캡산화막을 차례로 형성하는 공정과, 상기 폴리실리콘층과 캡산화막을 채널영역과 필드산화막의 일부영역에만 남도록 제거하여 게이트전극을 형성하는 공정과, 상기 게이트전극을 마스크로 저농도의 제2 도전형 불순물을 이온주입하고 필드산화막의 일부를 제거하는 공정과, 상기 게이트전극과 남아있는 필드산화막의 측면에 측벽을 형성하고 전면에 제2 도전형의 불순물이 도핑된 폴리실리콘을 증착하는 공정과, 상기 불순물이 도핑된 폴리실리콘층을 에치백하여 필드산화막이 제거된 영역에만 남도록하여 소오스 드레인영역을 형성하는 공정으로 이루어진다.

Description

반도체 소자의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도 (a) 내지 (i)는 본 발명의 반도체 소자의 공정단면도

Claims (1)

  1. 제1도전형의 반도체 기판상에 액티브 마스크를 사용하여 활성영역을 패터닝하고 소자격리영역에 필드산화막을 형성하는 공정과, 상기 활성영역에 문턱전압을 조절하기 위한 불순물 이온주입공정을 실시하고 전면에 폴리실리콘층과 캡산화막을 차례로 형성하는 공정과, 상기 폴리실리콘층과 캡산화막을 채널영역과 필드산화막의 일부영역에만 남도록 제거하여 게이트전극을 형성하는 공정과, 상기 게이트전극을 마스크로 저농도의 제2 도전형 불순물을 이온주입하고 필드산화막의 일부를 제거하는 공정과, 상기 게이트전극과 남아있는 필드산화막의 측면에 측벽을 형성하고 전면에 제2 도전형의 불순물이 도핑된 폴리실리콘을 증착하는 공정과, 상기 불순물이 도핑된 폴리실리콘층을 에치백하여 필드산화막이 제거된 영역에만 남도록하여 소오스 드레인영역을 형성하는 공정을 포함하여 이루어짐을 특징으로 하는 반도체 소자의 제조 방법.
KR1019950043302A 1995-11-23 1995-11-23 반도체 소자의 제조방법 KR0156158B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950043302A KR0156158B1 (ko) 1995-11-23 1995-11-23 반도체 소자의 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950043302A KR0156158B1 (ko) 1995-11-23 1995-11-23 반도체 소자의 제조방법

Publications (2)

Publication Number Publication Date
KR970030499A true KR970030499A (ko) 1997-06-26
KR0156158B1 KR0156158B1 (ko) 1998-12-01

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KR1019950043302A KR0156158B1 (ko) 1995-11-23 1995-11-23 반도체 소자의 제조방법

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KR0156158B1 (ko) 1998-12-01

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