KR960002712A - 반도체 패키지 코팅방법 - Google Patents

반도체 패키지 코팅방법 Download PDF

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Publication number
KR960002712A
KR960002712A KR1019940012954A KR19940012954A KR960002712A KR 960002712 A KR960002712 A KR 960002712A KR 1019940012954 A KR1019940012954 A KR 1019940012954A KR 19940012954 A KR19940012954 A KR 19940012954A KR 960002712 A KR960002712 A KR 960002712A
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South Korea
Prior art keywords
coating
wire
semiconductor package
coating method
paraxylylene
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KR1019940012954A
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English (en)
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KR0136615B1 (ko
Inventor
김일웅
이정량
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김광호
삼성전자 주식회사
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Priority to KR1019940012954A priority Critical patent/KR0136615B1/ko
Priority to TW084105813A priority patent/TW282570B/zh
Priority to JP7143328A priority patent/JPH0845978A/ja
Publication of KR960002712A publication Critical patent/KR960002712A/ko
Application granted granted Critical
Publication of KR0136615B1 publication Critical patent/KR0136615B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

고밀도 와이어를 갖는 반도체 패키지에 있어서, 본딩 와이어의 단락이나 처침으로 인한 전기적 불량이 야기되므로, 반도체 칩과 리드를 와이어 본딩한 후 수지로 몰딩하기 전에 코팅제를 150℃ 1torr에서 디파라크실릴렌을 기화시키고 상기 다파라크실렌을 690℃ 0.5torr에서 파라크실릴렌으로 열분해시킨 다음, 다수개의 와이어 본딩을 마친 리드 프레임 전체를 코팅 챔버내에서 35℃, 0.1torr 하에서 상기 열분해된 파라크실릴렌으로 코팅하여 폴리파라크실릴렌을 반도체 패키지의 전체에 형성시키는 코팅방법을 구현하였다. 따라서 이 코팅 방법은 와이어의 간격이 좁고 길이가 긴 일반적인 구조를 갖거나 리드-온-칩 구조를 갖는 모든 반도체 패키지에 적용될 수 있다.

Description

반도체 패키지 코팅방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명에 따른 반도체 패키지 코팅방법에 적용되는 코팅장치의 일 실시예를 나타낸 단면도,
제3도는 이 발명에 따른 반도체 패키지를 코팅한 상태를 나타내는 단면도이다.

Claims (4)

  1. 반도체 패키지내의 본드된 와이어의 코팅방법에 있어서; 다수개의 리드 프레임에 각각 탑재된 반도체 칩들을 전기적인 접속을 위하여 와이어 본딩하는 단계와; 상기 반도체 칩들이 탑재된 리드 프레임들과 본딩된 와이더들과 반도체 칩들을 각각 코팅제로 코팅하는 단계와; 상기 코팅된 리드 프레임들과 본딩된 와이어들과 반도체 칩들을 각각 외부 환경으로부터 보호하기 위하여 수지로 몰딩하는 단계와, 상기 몰딩후, 리드 프레임들의 외부 리드들을 디프래쉬하는 단계로 이루어진 반도체 패키지 코팅방법.
  2. 제1항에 있어서, 상기 코팅이 기체상태로 이루어지는 것을 특징으로 하는 반도체 패키지 코팅방법.
  3. 제1항에 있어서, 상기 코팅제는 디파라크실릴렌인 것을 특징으로 하는 반도체 패키지 코팅방법.
  4. 제3항에 있어서, 상기 디파라크실릴렌의 기화 조건은 150℃, 1torr이고, 열분해 조건은 690℃, 0.5torr이며, 상기 코팅 조건은 35℃, 0.1torr인 것을 특징으로 하는 반도체 패키지 코팅방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940012954A 1994-06-09 1994-06-09 반도체 패키지 코팅방법 KR0136615B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019940012954A KR0136615B1 (ko) 1994-06-09 1994-06-09 반도체 패키지 코팅방법
TW084105813A TW282570B (ko) 1994-06-09 1995-06-08
JP7143328A JPH0845978A (ja) 1994-06-09 1995-06-09 ワイヤの不良のないパッケージの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940012954A KR0136615B1 (ko) 1994-06-09 1994-06-09 반도체 패키지 코팅방법

Publications (2)

Publication Number Publication Date
KR960002712A true KR960002712A (ko) 1996-01-26
KR0136615B1 KR0136615B1 (ko) 1998-09-15

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ID=19384970

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Application Number Title Priority Date Filing Date
KR1019940012954A KR0136615B1 (ko) 1994-06-09 1994-06-09 반도체 패키지 코팅방법

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JP (1) JPH0845978A (ko)
KR (1) KR0136615B1 (ko)
TW (1) TW282570B (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3367458B2 (ja) * 1999-03-30 2003-01-14 株式会社デンソー 半導体装置の製造方法
KR100685406B1 (ko) * 2004-10-18 2007-02-22 삼성에스디아이 주식회사 보호부재를 가진 반도체 장치
KR101501735B1 (ko) * 2014-09-23 2015-03-12 제너셈(주) 반도체패키지의 emi 쉴드 처리공법

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Publication number Publication date
TW282570B (ko) 1996-08-01
JPH0845978A (ja) 1996-02-16
KR0136615B1 (ko) 1998-09-15

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