KR950034685A - 반도체 집적회로장치의 제조방법 - Google Patents

반도체 집적회로장치의 제조방법 Download PDF

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Publication number
KR950034685A
KR950034685A KR1019950009647A KR19950009647A KR950034685A KR 950034685 A KR950034685 A KR 950034685A KR 1019950009647 A KR1019950009647 A KR 1019950009647A KR 19950009647 A KR19950009647 A KR 19950009647A KR 950034685 A KR950034685 A KR 950034685A
Authority
KR
South Korea
Prior art keywords
silicon
metal
film
lower electrode
antifuse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019950009647A
Other languages
English (en)
Korean (ko)
Inventor
치카시 스즈키
고오스케 오큐야마
도시후미 다케다
가츠히코 구보타
Original Assignee
가나이 쓰토무
가부시키가이샤 히타치세이사쿠쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 쓰토무, 가부시키가이샤 히타치세이사쿠쇼 filed Critical 가나이 쓰토무
Publication of KR950034685A publication Critical patent/KR950034685A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
KR1019950009647A 1994-05-12 1995-04-24 반도체 집적회로장치의 제조방법 Withdrawn KR950034685A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP6098548A JPH07307386A (ja) 1994-05-12 1994-05-12 半導体集積回路装置の製造方法
JP94-98548 1995-05-12

Publications (1)

Publication Number Publication Date
KR950034685A true KR950034685A (ko) 1995-12-28

Family

ID=14222749

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950009647A Withdrawn KR950034685A (ko) 1994-05-12 1995-04-24 반도체 집적회로장치의 제조방법

Country Status (4)

Country Link
JP (1) JPH07307386A (enrdf_load_stackoverflow)
KR (1) KR950034685A (enrdf_load_stackoverflow)
CN (1) CN1123956A (enrdf_load_stackoverflow)
TW (1) TW283789B (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100328709B1 (ko) * 1999-07-07 2002-03-20 박종섭 프로그래밍 부위 형성방법

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7271076B2 (en) * 2003-12-19 2007-09-18 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of thin film integrated circuit device and manufacturing method of non-contact type thin film integrated circuit device
CN101562151B (zh) * 2008-04-15 2012-04-18 和舰科技(苏州)有限公司 具有金属硅化物的半导体结构及形成金属硅化物的方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100328709B1 (ko) * 1999-07-07 2002-03-20 박종섭 프로그래밍 부위 형성방법

Also Published As

Publication number Publication date
TW283789B (enrdf_load_stackoverflow) 1996-08-21
JPH07307386A (ja) 1995-11-21
CN1123956A (zh) 1996-06-05

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19950424

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid