KR950016018A - 효율적인 메모리 사용 방법, 효율적인 자원 사용방법, 보유를 위한 다음 상태 코스트의 결정방법, 신호처리를 위한 집적회로 및 디지탈 신호 변환 방법 - Google Patents

효율적인 메모리 사용 방법, 효율적인 자원 사용방법, 보유를 위한 다음 상태 코스트의 결정방법, 신호처리를 위한 집적회로 및 디지탈 신호 변환 방법 Download PDF

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Publication number
KR950016018A
KR950016018A KR1019940029898A KR19940029898A KR950016018A KR 950016018 A KR950016018 A KR 950016018A KR 1019940029898 A KR1019940029898 A KR 1019940029898A KR 19940029898 A KR19940029898 A KR 19940029898A KR 950016018 A KR950016018 A KR 950016018A
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KR
South Korea
Prior art keywords
array
cost
cumulative
cumulative cost
next state
Prior art date
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Abandoned
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KR1019940029898A
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English (en)
Korean (ko)
Inventor
마크 블래커 데이비드
스테펜 다이아몬드스테인 마르크
스테펜 엘라드 그레고리
샤피울 모빈 모하메드
샘 호마윤
에르네스트 씨에르바크 마크
Original Assignee
디.엘.스미스
에이티앤드티 코포레이션
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Filing date
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Application filed by 디.엘.스미스, 에이티앤드티 코포레이션 filed Critical 디.엘.스미스
Publication of KR950016018A publication Critical patent/KR950016018A/ko
Abandoned legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4138—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors soft-output Viterbi algorithm based decoding, i.e. Viterbi decoding with weighted decisions
    • H03M13/4146—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors soft-output Viterbi algorithm based decoding, i.e. Viterbi decoding with weighted decisions soft-output Viterbi decoding according to Battail and Hagenauer in which the soft-output is determined using path metric differences along the maximum-likelihood path, i.e. "SOVA" decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3961—Arrangements of methods for branch or transition metric calculation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Dc Digital Transmission (AREA)
KR1019940029898A 1993-11-16 1994-11-15 효율적인 메모리 사용 방법, 효율적인 자원 사용방법, 보유를 위한 다음 상태 코스트의 결정방법, 신호처리를 위한 집적회로 및 디지탈 신호 변환 방법 Abandoned KR950016018A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/153,334 US5465275A (en) 1993-11-16 1993-11-16 Efficient utilization of present state/next state registers
US8/153,334 1993-11-16

Publications (1)

Publication Number Publication Date
KR950016018A true KR950016018A (ko) 1995-06-17

Family

ID=22546761

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940029898A Abandoned KR950016018A (ko) 1993-11-16 1994-11-15 효율적인 메모리 사용 방법, 효율적인 자원 사용방법, 보유를 위한 다음 상태 코스트의 결정방법, 신호처리를 위한 집적회로 및 디지탈 신호 변환 방법

Country Status (5)

Country Link
US (2) US5465275A (enExample)
EP (1) EP0653849A3 (enExample)
JP (1) JP3262250B2 (enExample)
KR (1) KR950016018A (enExample)
TW (1) TW271518B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6366148B1 (en) 1999-11-29 2002-04-02 Samsung Electronics Co., Ltd. Delay locked loop circuit and method for generating internal clock signal

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FR2718865B1 (fr) * 1994-04-15 1996-07-19 Texas Instruments France Procédé et dispositif à processeur de signaux numériques pour la mise en Óoeuvre d'un algorithme de Viterbi.
FR2724273B1 (fr) * 1994-09-05 1997-01-03 Sgs Thomson Microelectronics Circuit de traitement de signal pour mettre en oeuvre un algorithme de viterbi
US5619514A (en) * 1994-12-29 1997-04-08 Lucent Technologies Inc. In-place present state/next state registers
JP3171772B2 (ja) * 1995-08-23 2001-06-04 沖電気工業株式会社 ビタビ復号方法及びビタビ復号装置
EP0782358A3 (en) 1995-12-29 1999-07-21 Lucent Technologies Inc. Mobile communicator
JPH09232973A (ja) * 1996-02-28 1997-09-05 Sony Corp ビタビ復号器
US5742622A (en) * 1996-03-12 1998-04-21 Discovision Associates Error detection and correction system for a stream of encoded data
US5802116A (en) * 1996-04-04 1998-09-01 Lucent Technologies Inc. Soft decision Viterbi decoding with large constraint lengths
GB9622540D0 (en) * 1996-10-30 1997-01-08 Discovision Ass Trackback for viterbi decoder
US6522696B1 (en) 1997-04-11 2003-02-18 Agere Systems Inc. Adaptive frequency correction in a wireless communications system, such as for GSM and IS54
KR100484127B1 (ko) * 1997-08-07 2005-06-16 삼성전자주식회사 비터비디코더
US6009128A (en) * 1997-09-08 1999-12-28 Lucent Technologies, Inc. Metric acceleration on dual MAC processor
DE69936683T2 (de) * 1998-06-01 2008-04-30 Her Majesty The Queen In Right Of Canada As Represented By The Minister Of Industry, Ottawa Verschachtelung unter Verwendung von Inkrementen basierend auf dem Goldenen Schnitt
JP4071879B2 (ja) * 1998-12-09 2008-04-02 富士通株式会社 誤り検出器、この誤り検出器を備えた通信システム、および誤り検出方法
US6591395B1 (en) * 2000-06-18 2003-07-08 Silicon Integrated Systems Corporation Memory reduction techniques in a viterbi decoder
US7020830B2 (en) * 2001-12-24 2006-03-28 Agere Systems Inc. High speed add-compare-select operations for use in viterbi decoders
TWI228654B (en) * 2003-07-11 2005-03-01 Mediatek Inc Non-binary Viterbi data processing system and method
US20080152044A1 (en) * 2006-12-20 2008-06-26 Media Tek Inc. Veterbi decoding method for convolutionally encoded signal
US11367500B2 (en) 2019-12-20 2022-06-21 Taiwan Semiconductor Manufacturing Company, Ltd. Method for LUT-free memory repair
DE102020120488A1 (de) 2019-12-20 2021-06-24 Taiwan Semiconductor Manufacturing Co. Ltd. Verfahren zur nachschlagtabellenfreien speicherreperatur

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NZ198844A (en) * 1980-11-14 1984-05-31 Plessey Overseas Digital information transmission: two dimensional code
GB8315363D0 (en) * 1983-06-03 1983-07-06 Gordon J A Decoding errorcorrecting codes
US4583078A (en) * 1984-11-13 1986-04-15 Communications Satellite Corporation Serial Viterbi decoder
US4868830A (en) * 1985-09-27 1989-09-19 California Institute Of Technology Method and apparatus for implementing a traceback maximum-likelihood decoder in a hypercube network
US4748626A (en) * 1987-01-28 1988-05-31 Racal Data Communications Inc. Viterbi decoder with reduced number of data move operations
US4979175A (en) * 1988-07-05 1990-12-18 Motorola, Inc. State metric memory arrangement for a viterbi decoder
FR2669445B1 (fr) * 1990-11-15 1993-01-08 Alcatel Radiotelephone Dispositif prevu pour le traitement de l'algorithme de viterbi comprenant un processeur et un operateur specialise.
KR930004862B1 (ko) * 1990-12-17 1993-06-09 삼성전자 주식회사 상태 평가량 기억장치
BE1004814A3 (nl) * 1991-05-08 1993-02-02 Bell Telephone Mfg Decodeerinrichting.
JP2917577B2 (ja) * 1991-05-30 1999-07-12 松下電器産業株式会社 演算装置
JP3120511B2 (ja) * 1991-11-21 2000-12-25 ソニー株式会社 ビタビ復号装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6366148B1 (en) 1999-11-29 2002-04-02 Samsung Electronics Co., Ltd. Delay locked loop circuit and method for generating internal clock signal

Also Published As

Publication number Publication date
JPH07191868A (ja) 1995-07-28
TW271518B (enExample) 1996-03-01
EP0653849A3 (en) 1997-01-29
US5559837A (en) 1996-09-24
US5465275A (en) 1995-11-07
EP0653849A2 (en) 1995-05-17
JP3262250B2 (ja) 2002-03-04

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Patent event date: 20010629

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