TW271518B - - Google Patents

Info

Publication number
TW271518B
TW271518B TW082110304A TW82110304A TW271518B TW 271518 B TW271518 B TW 271518B TW 082110304 A TW082110304 A TW 082110304A TW 82110304 A TW82110304 A TW 82110304A TW 271518 B TW271518 B TW 271518B
Authority
TW
Taiwan
Application number
TW082110304A
Other languages
Chinese (zh)
Inventor
Mark Ernest Thierbach
Original Assignee
At & T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At & T Corp filed Critical At & T Corp
Application granted granted Critical
Publication of TW271518B publication Critical patent/TW271518B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4138—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors soft-output Viterbi algorithm based decoding, i.e. Viterbi decoding with weighted decisions
    • H03M13/4146—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors soft-output Viterbi algorithm based decoding, i.e. Viterbi decoding with weighted decisions soft-output Viterbi decoding according to Battail and Hagenauer in which the soft-output is determined using path metric differences along the maximum-likelihood path, i.e. "SOVA" decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3961—Arrangements of methods for branch or transition metric calculation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Dc Digital Transmission (AREA)
TW082110304A 1993-11-16 1993-12-06 TW271518B (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/153,334 US5465275A (en) 1993-11-16 1993-11-16 Efficient utilization of present state/next state registers

Publications (1)

Publication Number Publication Date
TW271518B true TW271518B (enExample) 1996-03-01

Family

ID=22546761

Family Applications (1)

Application Number Title Priority Date Filing Date
TW082110304A TW271518B (enExample) 1993-11-16 1993-12-06

Country Status (5)

Country Link
US (2) US5465275A (enExample)
EP (1) EP0653849A3 (enExample)
JP (1) JP3262250B2 (enExample)
KR (1) KR950016018A (enExample)
TW (1) TW271518B (enExample)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2718865B1 (fr) * 1994-04-15 1996-07-19 Texas Instruments France Procédé et dispositif à processeur de signaux numériques pour la mise en Óoeuvre d'un algorithme de Viterbi.
FR2724273B1 (fr) * 1994-09-05 1997-01-03 Sgs Thomson Microelectronics Circuit de traitement de signal pour mettre en oeuvre un algorithme de viterbi
US5619514A (en) * 1994-12-29 1997-04-08 Lucent Technologies Inc. In-place present state/next state registers
JP3171772B2 (ja) * 1995-08-23 2001-06-04 沖電気工業株式会社 ビタビ復号方法及びビタビ復号装置
EP0782358A3 (en) 1995-12-29 1999-07-21 Lucent Technologies Inc. Mobile communicator
JPH09232973A (ja) * 1996-02-28 1997-09-05 Sony Corp ビタビ復号器
US5742622A (en) * 1996-03-12 1998-04-21 Discovision Associates Error detection and correction system for a stream of encoded data
US5802116A (en) * 1996-04-04 1998-09-01 Lucent Technologies Inc. Soft decision Viterbi decoding with large constraint lengths
GB9622540D0 (en) * 1996-10-30 1997-01-08 Discovision Ass Trackback for viterbi decoder
US6522696B1 (en) 1997-04-11 2003-02-18 Agere Systems Inc. Adaptive frequency correction in a wireless communications system, such as for GSM and IS54
KR100484127B1 (ko) * 1997-08-07 2005-06-16 삼성전자주식회사 비터비디코더
US6009128A (en) * 1997-09-08 1999-12-28 Lucent Technologies, Inc. Metric acceleration on dual MAC processor
US6530059B1 (en) * 1998-06-01 2003-03-04 Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communication Research Centre Tail-biting turbo-code encoder and associated decoder
JP4071879B2 (ja) * 1998-12-09 2008-04-02 富士通株式会社 誤り検出器、この誤り検出器を備えた通信システム、および誤り検出方法
KR100331562B1 (ko) 1999-11-29 2002-04-06 윤종용 지연 동기 루프 회로 및 내부 클럭 신호 발생 방법
US6591395B1 (en) * 2000-06-18 2003-07-08 Silicon Integrated Systems Corporation Memory reduction techniques in a viterbi decoder
US7020830B2 (en) * 2001-12-24 2006-03-28 Agere Systems Inc. High speed add-compare-select operations for use in viterbi decoders
TWI228654B (en) * 2003-07-11 2005-03-01 Mediatek Inc Non-binary Viterbi data processing system and method
US20080152044A1 (en) * 2006-12-20 2008-06-26 Media Tek Inc. Veterbi decoding method for convolutionally encoded signal
US11367500B2 (en) 2019-12-20 2022-06-21 Taiwan Semiconductor Manufacturing Company, Ltd. Method for LUT-free memory repair
DE102020120488A1 (de) * 2019-12-20 2021-06-24 Taiwan Semiconductor Manufacturing Co. Ltd. Verfahren zur nachschlagtabellenfreien speicherreperatur

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NZ198844A (en) * 1980-11-14 1984-05-31 Plessey Overseas Digital information transmission: two dimensional code
GB8315363D0 (en) * 1983-06-03 1983-07-06 Gordon J A Decoding errorcorrecting codes
US4583078A (en) * 1984-11-13 1986-04-15 Communications Satellite Corporation Serial Viterbi decoder
US4868830A (en) * 1985-09-27 1989-09-19 California Institute Of Technology Method and apparatus for implementing a traceback maximum-likelihood decoder in a hypercube network
US4748626A (en) * 1987-01-28 1988-05-31 Racal Data Communications Inc. Viterbi decoder with reduced number of data move operations
US4979175A (en) * 1988-07-05 1990-12-18 Motorola, Inc. State metric memory arrangement for a viterbi decoder
FR2669445B1 (fr) * 1990-11-15 1993-01-08 Alcatel Radiotelephone Dispositif prevu pour le traitement de l'algorithme de viterbi comprenant un processeur et un operateur specialise.
KR930004862B1 (ko) * 1990-12-17 1993-06-09 삼성전자 주식회사 상태 평가량 기억장치
BE1004814A3 (nl) * 1991-05-08 1993-02-02 Bell Telephone Mfg Decodeerinrichting.
JP2917577B2 (ja) * 1991-05-30 1999-07-12 松下電器産業株式会社 演算装置
JP3120511B2 (ja) * 1991-11-21 2000-12-25 ソニー株式会社 ビタビ復号装置

Also Published As

Publication number Publication date
US5559837A (en) 1996-09-24
US5465275A (en) 1995-11-07
KR950016018A (ko) 1995-06-17
EP0653849A2 (en) 1995-05-17
JPH07191868A (ja) 1995-07-28
JP3262250B2 (ja) 2002-03-04
EP0653849A3 (en) 1997-01-29

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Legal Events

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MK4A Expiration of patent term of an invention patent