KR940005816B1 - 데이타 처리장치 - Google Patents

데이타 처리장치 Download PDF

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Publication number
KR940005816B1
KR940005816B1 KR1019850008350A KR850008350A KR940005816B1 KR 940005816 B1 KR940005816 B1 KR 940005816B1 KR 1019850008350 A KR1019850008350 A KR 1019850008350A KR 850008350 A KR850008350 A KR 850008350A KR 940005816 B1 KR940005816 B1 KR 940005816B1
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KR
South Korea
Prior art keywords
data
memory
system bus
processor
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019850008350A
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English (en)
Korean (ko)
Other versions
KR860005284A (ko
Inventor
요시오 기따무라
히로시 다끼쯔까
다다오 이시하라
Original Assignee
소니 가부시끼가이샤
오오가 노리오
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 소니 가부시끼가이샤, 오오가 노리오 filed Critical 소니 가부시끼가이샤
Publication of KR860005284A publication Critical patent/KR860005284A/ko
Application granted granted Critical
Publication of KR940005816B1 publication Critical patent/KR940005816B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1647Handling requests for interconnection or transfer for access to memory bus based on arbitration with interleaved bank access
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Image Processing (AREA)
  • Advance Control (AREA)
  • Processing Or Creating Images (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1019850008350A 1984-12-24 1985-11-08 데이타 처리장치 Expired - Fee Related KR940005816B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP84-280817 1984-12-24
JP59280817A JPS61150059A (ja) 1984-12-24 1984-12-24 デ−タ処理装置

Publications (2)

Publication Number Publication Date
KR860005284A KR860005284A (ko) 1986-07-21
KR940005816B1 true KR940005816B1 (ko) 1994-06-23

Family

ID=17630389

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850008350A Expired - Fee Related KR940005816B1 (ko) 1984-12-24 1985-11-08 데이타 처리장치

Country Status (7)

Country Link
US (1) US4928234A (https=)
EP (1) EP0187518B1 (https=)
JP (1) JPS61150059A (https=)
KR (1) KR940005816B1 (https=)
AT (1) ATE73242T1 (https=)
AU (1) AU578772B2 (https=)
DE (1) DE3585519D1 (https=)

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US5193193A (en) * 1988-09-14 1993-03-09 Silicon Graphics, Inc. Bus control system for arbitrating requests with predetermined on/off time limitations
FR2638260B1 (fr) * 1988-10-26 1994-04-29 Onera (Off Nat Aerospatiale) Dispositifs de commutation et reseaux de communication de donnees pour systemes multiprocesseurs
US5369775A (en) * 1988-12-20 1994-11-29 Mitsubishi Denki Kabushiki Kaisha Data-flow processing system having an input packet limiting section for preventing packet input based upon a threshold value indicative of an optimum pipeline processing capacity
JPH0719221B2 (ja) * 1988-12-27 1995-03-06 日本電気株式会社 記憶制御方式
JPH0740241B2 (ja) * 1989-01-17 1995-05-01 富士通株式会社 リクエストキャンセル方式
KR930002316B1 (ko) * 1989-05-10 1993-03-29 미쯔비시덴끼 가부시끼가이샤 버스제어방법 및 화상처리 장치
JPH03142678A (ja) * 1989-10-30 1991-06-18 Toshiba Corp 電子ファイリングシステム
GB2248322B (en) * 1990-09-25 1994-04-06 Sony Broadcast & Communication Memory apparatus
US5440713A (en) * 1992-05-29 1995-08-08 Industrial Technology Research Institute M-way N-port paged-interleaved memory system
US5420965A (en) * 1992-06-05 1995-05-30 Software Projects, Inc. Single pass method of compressing data transmitted to command driven terminal
JP2679540B2 (ja) * 1992-07-15 1997-11-19 ヤマハ株式会社 メモリ制御装置
US5732041A (en) * 1993-08-19 1998-03-24 Mmc Networks, Inc. Memory interface unit, shared memory switch system and associated method
US5440523A (en) * 1993-08-19 1995-08-08 Multimedia Communications, Inc. Multiple-port shared memory interface and associated method
US5717950A (en) * 1994-01-11 1998-02-10 Hitachi, Ltd. Input/output device information management system for multi-computer system
US5546547A (en) * 1994-01-28 1996-08-13 Apple Computer, Inc. Memory bus arbiter for a computer system having a dsp co-processor
JPH08241214A (ja) * 1995-03-06 1996-09-17 Hitachi Ltd データ処理システム
US5872729A (en) * 1995-11-27 1999-02-16 Sun Microsystems, Inc. Accumulation buffer method and apparatus for graphical image processing
FR2746527B1 (fr) * 1996-03-21 1998-05-07 Suisse Electronique Microtech Dispositif de traitement d'information comportant plusieurs processeurs en parallele
US6332165B1 (en) 1997-09-05 2001-12-18 Sun Microsystems, Inc. Multiprocessor computer system employing a mechanism for routing communication traffic through a cluster node having a slice of memory directed for pass through transactions
US5930484A (en) * 1997-09-18 1999-07-27 International Business Machines Corporation Method and system for input/output control in a multiprocessor system utilizing simultaneous variable-width bus access
US6170046B1 (en) 1997-10-28 2001-01-02 Mmc Networks, Inc. Accessing a memory system via a data or address bus that provides access to more than one part
US6378072B1 (en) * 1998-02-03 2002-04-23 Compaq Computer Corporation Cryptographic system
US6182196B1 (en) * 1998-02-20 2001-01-30 Ati International Srl Method and apparatus for arbitrating access requests to a memory
JP3139998B2 (ja) 1998-12-01 2001-03-05 株式会社東京精密 外観検査装置及び方法
US6952215B1 (en) 1999-03-31 2005-10-04 International Business Machines Corporation Method and system for graphics rendering using captured graphics hardware instructions
US6611796B1 (en) * 1999-10-20 2003-08-26 Texas Instruments Incorporated Method and apparatus for combining memory blocks for in circuit emulation
GB2381338B (en) * 2001-10-26 2006-04-26 Hewlett Packard Co Improvements in or relating to processing data
US8732368B1 (en) * 2005-02-17 2014-05-20 Hewlett-Packard Development Company, L.P. Control system for resource selection between or among conjoined-cores
US20070239897A1 (en) * 2006-03-29 2007-10-11 Rothman Michael A Compressing or decompressing packet communications from diverse sources
KR100813256B1 (ko) * 2006-06-23 2008-03-13 삼성전자주식회사 버스 중재 장치 및 방법
WO2008145194A1 (en) * 2007-05-31 2008-12-04 Abilis Systems Sàrl Device and method to process ofdm-based symbols in wireless network
WO2009012409A2 (en) 2007-07-17 2009-01-22 Opvista Incorporated Optical ring networks having node-to-node optical communication channels for carrying data traffic
US9170844B2 (en) * 2009-01-02 2015-10-27 International Business Machines Corporation Prioritization for conflict arbitration in transactional memory management
US9485050B2 (en) 2009-12-08 2016-11-01 Treq Labs, Inc. Subchannel photonic routing, switching and protection with simplified upgrades of WDM optical networks
US8705741B2 (en) 2010-02-22 2014-04-22 Vello Systems, Inc. Subchannel security at the optical layer
US20120066444A1 (en) * 2010-09-14 2012-03-15 Advanced Micro Devices, Inc. Resolution Enhancement of Video Stream Based on Spatial and Temporal Correlation
US8542999B2 (en) 2011-02-01 2013-09-24 Vello Systems, Inc. Minimizing bandwidth narrowing penalties in a wavelength selective switch optical network
US10241941B2 (en) * 2015-06-29 2019-03-26 Nxp Usa, Inc. Systems and methods for asymmetric memory access to memory banks within integrated circuit systems

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US3593300A (en) * 1967-11-13 1971-07-13 Ibm Arrangement for automatically selecting units for task executions in data processing systems
US3566363A (en) * 1968-07-11 1971-02-23 Ibm Processor to processor communication in a multiprocessor computer system
US3931613A (en) * 1974-09-25 1976-01-06 Data General Corporation Data processing system
US4048623A (en) * 1974-09-25 1977-09-13 Data General Corporation Data processing system
JPS5837585B2 (ja) * 1975-09-30 1983-08-17 株式会社東芝 ケイサンキソウチ
US4128876A (en) * 1977-04-28 1978-12-05 International Business Machines Corporation Synchronous microcode generated interface for system of microcoded data processors
US4363094A (en) * 1977-12-29 1982-12-07 M/A-COM DDC, Inc. Communications processor
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US4449183A (en) * 1979-07-09 1984-05-15 Digital Equipment Corporation Arbitration scheme for a multiported shared functional device for use in multiprocessing systems
GB2062912B (en) * 1979-09-29 1983-09-14 Plessey Co Ltd Data processing system including internal register addressing arrangements
US4392200A (en) * 1980-01-28 1983-07-05 Digital Equipment Corporation Cached multiprocessor system with pipeline timing
US4371929A (en) * 1980-05-05 1983-02-01 Ibm Corporation Multiprocessor system with high density memory set architecture including partitionable cache store interface to shared disk drive memory
US4400768A (en) * 1980-06-04 1983-08-23 Burroughs Corporation Parallel access computer memory system employing a power-of-two memory modules
US4366539A (en) * 1980-10-31 1982-12-28 Honeywell Information Systems Inc. Memory controller with burst mode capability
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US4453211A (en) * 1981-04-28 1984-06-05 Formation, Inc. System bus for an emulated multichannel system
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US4473880A (en) * 1982-01-26 1984-09-25 Intel Corporation Arbitration means for controlling access to a bus shared by a number of modules
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Also Published As

Publication number Publication date
DE3585519D1 (de) 1992-04-09
JPH0542702B2 (https=) 1993-06-29
AU5111885A (en) 1986-07-03
AU578772B2 (en) 1988-11-03
JPS61150059A (ja) 1986-07-08
ATE73242T1 (de) 1992-03-15
KR860005284A (ko) 1986-07-21
EP0187518B1 (en) 1992-03-04
EP0187518A2 (en) 1986-07-16
EP0187518A3 (en) 1988-08-03
US4928234A (en) 1990-05-22

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