KR920020771A - 화합물 반도체용 오옴접촉부 제조방법 - Google Patents

화합물 반도체용 오옴접촉부 제조방법 Download PDF

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KR920020771A
KR920020771A KR1019920007208A KR920007208A KR920020771A KR 920020771 A KR920020771 A KR 920020771A KR 1019920007208 A KR1019920007208 A KR 1019920007208A KR 920007208 A KR920007208 A KR 920007208A KR 920020771 A KR920020771 A KR 920020771A
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metal layer
ohmic contact
compound semiconductor
layer
tempering
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KR1019920007208A
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KR0164226B1 (ko
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요헨 게르너
베르너 샤이러
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클라우스 봄하르트,한스-위르겐 마우테
텔레풍켄 엘렉트로닉 게엠베하
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/452—Ohmic electrodes on AIII-BV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/405—Reflective materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Led Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

내용 없음

Description

화합물 반도체용 오옴접촉부 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 의한 방법의 흐름도.
제2도는 온도처리하기 전의 연속층 접촉단면도.
제3a도 내지 제3d도는 본 발명에 의한 오옴접촉 제조를 위한 공정단계도.
제4도는 여러가지 텝퍼링 공정동안 도핑된 기판상에 본 발명에 의한 특정 접촉 저항의 접촉에 따른 그래프.
제5도는 본 발명에 의한 후면접촉을 가진 발광 반도체 다이오드의 단면도.
제6도는 CaAs 및 두개의 다른 접촉 금속에 대한 파장에 의한 반사율의 그래프.
제7도는 두개의 다른 텝퍼링 조건동안 본 발명에 따라 후면접촉의 게르마늄 농도에 의한 적외선 다이오드의 광학파워 입력의 그래프.

Claims (10)

  1. Ⅲ-V화합물 반도체의 n으로 도핑된 반도체 층(1)상의 오옴 접촉부를 제조하기 위한 방법에 있어서, 제1금속층(2)의 Ge 내용물이 중량분율 1%를 초과하지 않도록 상기 반도체 층(1)상에 AuGe를 포함한 상기 제1금속층(2)의 증착공정단계; 상기 제1금속층(2)상에 Au를 포함한 제2금속층(3)의 증착공정단계; 40에서 180분동안 360에서 390℃에서 연속층의 템퍼링 공정단계를 포함하는 것을 특징으로 하는 오옴접촉부 제조방법.
  2. 제1항에 있어서, 템퍼링 공정단계가 430에서 480℃의 온도 및 5에서 20초의 시간에서 급 어닐링 공정단계로 대체할 수 있는 것을 특징으로 하는 오옴접촉부 제조방법.
  3. 제1항 또는 제2항에 있어서, 상기 두 금속층(2,3)에서 평균된 게르마늄 내용물이 중량분을 0.02%인 것을 특징으로 하는 오옴접촉부 제조방법.
  4. 제3항에 있어서, 상기 제1금속층(2)은 5에서 50nm의 두께이고 상기 제2금속층(3)은 200~600nm의 두께인 것을 특징으로 하는 오옴접촉부 제조방법.
  5. 제1항 내지 제4항중 어느 한 항에 있어서, 템퍼링 또는 급어닐링 단계가 불활성 분위기에서 일어나는 것을 특징으로 하는 오옴접촉부 제조방법.
  6. 제2항에 있어서, 템퍼링이 환원 분위기에서 일어나는 것을 특징으로 하는 오옴접촉 제조방법.
  7. 제1항에 있어서, 상기 III-V 화합물 반도체는 100 또는 111 방향을 가진 n-도전형의 GaAs인 것을 특징으로 하는 오옴접촉부 제조방법.
  8. 제7항에 있어서, 상기 제1금속층(2)은 게르마늄 중량분율 0.5%을 포함하며 10nm 두께이고 상기 제2금속층(3)은 240mn두께인 것을 특징으로 하는 오옴접촉부 제조방법.
  9. 제8항에 있어서, 연속층은 대략 380℃의 온도에서 대략 120분에서 템퍼링되는 것을 특징으로 하는 오옴접촉부 제조방법.
  10. * 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019920007208A 1991-04-29 1992-04-29 화합물 반도체용 옴접촉부 형성방법 KR0164226B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4113969A DE4113969A1 (de) 1991-04-29 1991-04-29 Verfahren zur herstellung von ohmschen kontakten fuer verbindungshalbleiter
DEP4113969.0 1991-04-29

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KR920020771A true KR920020771A (ko) 1992-11-21
KR0164226B1 KR0164226B1 (ko) 1998-12-15

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JP (1) JP2550257B2 (ko)
KR (1) KR0164226B1 (ko)
DE (1) DE4113969A1 (ko)

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DE19536438A1 (de) * 1995-09-29 1997-04-03 Siemens Ag Halbleiterbauelement und Herstellverfahren
EP1148983B1 (de) * 1999-01-04 2005-04-13 Infineon Technologies AG Verfahren und vorrichtung zur formgebung von halbleiteroberflächen
US6992334B1 (en) 1999-12-22 2006-01-31 Lumileds Lighting U.S., Llc Multi-layer highly reflective ohmic contacts for semiconductor devices
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DE102004004780B9 (de) * 2003-01-31 2019-04-25 Osram Opto Semiconductors Gmbh Verfahren zum Herstellen eines Bauelementes mit einem elektrischen Kontaktbereich und Bauelement mit einem elektrischen Kontaktbereich
DE10308322B4 (de) * 2003-01-31 2014-11-06 Osram Opto Semiconductors Gmbh Verfahren zum Herstellen eines elektrischen Kontaktbereiches auf einer Halbleiterschicht und Bauelement mit derartigem Kontaktbereich
DE10329515B9 (de) * 2003-06-30 2022-01-20 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Elektromagnetische Strahlung emittierendes Bauelement und Verfahren zu dessen Herstellung
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DE10334634B3 (de) * 2003-07-29 2005-01-13 Infineon Technologies Ag Verfahren zum seitlichen Kontaktieren eines Halbleiterchips
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ES2471568B1 (es) * 2012-11-22 2015-08-21 Abengoa Solar New Technologies S.A. Procedimiento para la creación de contactos eléctricos y contactos así creados
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CN108550666A (zh) * 2018-05-02 2018-09-18 天津三安光电有限公司 倒装四元系发光二极管外延结构、倒装四元系发光二极管及其生长方法

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Publication number Publication date
JP2550257B2 (ja) 1996-11-06
US5250466A (en) 1993-10-05
DE4113969A1 (de) 1992-11-05
KR0164226B1 (ko) 1998-12-15
JPH05121353A (ja) 1993-05-18
DE4113969C2 (ko) 1993-02-11

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