KR920013937A - 반도체집적회로 - Google Patents
반도체집적회로 Download PDFInfo
- Publication number
- KR920013937A KR920013937A KR1019910022315A KR910022315A KR920013937A KR 920013937 A KR920013937 A KR 920013937A KR 1019910022315 A KR1019910022315 A KR 1019910022315A KR 910022315 A KR910022315 A KR 910022315A KR 920013937 A KR920013937 A KR 920013937A
- Authority
- KR
- South Korea
- Prior art keywords
- output
- converter
- circuit
- signal
- digital
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/3167—Testing of combined analog and digital circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Tests Of Electronic Circuits (AREA)
- Analogue/Digital Conversion (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예에 있어서의 반도체 집적회로를 탑재한 보오드의 블록도, 제2도는 본 발명의 다른 실시예에 있어서의 반도체 집적회로를 탑재한 보오드의 블록도, 제3도는 본 발명의 또 다른 실시예에 있어서의 반도체 집적회로를 탑재한 보오드의 블록도.
Claims (3)
- A/D변환기와, 상기 A/D변환기의 출력에 접속된 디지틀회로와, 상기 A/D변환기의 출력과 상기 디지틀회로의 출력을 입력으로 하는 디지틀신호 절환기와, 상기 디지틀신호절환기의 출력에 접속된 경계·주사출력회로를 구비한 것을 특징으로 하는 반도체 집적회로.
- 애널로그신호입력단자와, 상기 애널로그신호입력단자에 접속된 애널로그회로와, 상기 애널로그신호입력단자와 상기 애널로그회로의 출력을 입력으로 하는 애널로그 신호절환기와, 상기 애널로그신호절환기의 출력에 접속된 A/D변환기와 상기 A/D변환기의 출력에 접속된 디지틀회로와, 상기 A/D변환기의 출력과 상기 디지틀 회로의 출력을 입력으로 하는 디지틀신호절환기와, 상기 디지틀 신호절환기의 출력에 접속된 경계·주사출력회로를 구비한 것을 특징으로 하는 반도체 집적회로.
- 애널로그신호입력단자와, 상기 애널로그신호입력단자에 접속된 애널로그회로와, 상기 애널로그신호입력단자와 상기 애널로그회로의 출력을 입력으로 하는 애널로그 신호절환기와 상기 애널로그신호절환기의 출력에 접속된 A/D변환기와 상기 A/D변환기의 출력에 접속된 경계·주사출력회로를 구비한 것을 특징으로 하는 반도체 집적회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP90-400584 | 1990-12-06 | ||
JP2400584A JPH04212524A (ja) | 1990-12-06 | 1990-12-06 | 半導体集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920013937A true KR920013937A (ko) | 1992-07-30 |
KR960003087B1 KR960003087B1 (ko) | 1996-03-04 |
Family
ID=18510480
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910022315A KR960003087B1 (ko) | 1990-12-06 | 1991-12-06 | 반도체집적회로 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5225834A (ko) |
EP (1) | EP0489394B1 (ko) |
JP (1) | JPH04212524A (ko) |
KR (1) | KR960003087B1 (ko) |
DE (1) | DE69126848T2 (ko) |
MY (1) | MY115272A (ko) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3180421B2 (ja) * | 1992-03-30 | 2001-06-25 | 日本電気株式会社 | テスト回路を内蔵したアナログ・ディジタル混在マスタ |
JP3563750B2 (ja) * | 1992-10-16 | 2004-09-08 | テキサス インスツルメンツ インコーポレイテツド | アナログ回路のための走査に基づく試験 |
US5404358A (en) * | 1993-02-04 | 1995-04-04 | Bull Hn Information Systems Inc. | Boundary scan architecture analog extension |
GB9303758D0 (en) * | 1993-02-25 | 1993-04-14 | Texas Instruments Ltd | Improvements in or relating to integrated logic circuits |
US5581176A (en) * | 1993-05-24 | 1996-12-03 | North American Philips Corporation | Analog autonomous test bus framework for testing integrated circuits on a printed circuit board |
GB2278689B (en) * | 1993-06-02 | 1997-03-19 | Ford Motor Co | Method and apparatus for testing integrated circuits |
US5744949A (en) * | 1993-08-17 | 1998-04-28 | Texas Instruments Incorporated | Analog test cell circuit |
US5659257A (en) * | 1994-07-05 | 1997-08-19 | Ford Motor Company | Method and circuit structure for measuring and testing discrete components on mixed-signal circuit boards |
JPH08154055A (ja) * | 1994-11-25 | 1996-06-11 | Oki Electric Ind Co Ltd | アナログ/デジタル変換器 |
US5659312A (en) * | 1996-06-14 | 1997-08-19 | Logicvision, Inc. | Method and apparatus for testing digital to analog and analog to digital converters |
US5974578A (en) * | 1996-08-06 | 1999-10-26 | Matsushita Electronics Corporation | Integrated circuit and test method therefor |
TW356596B (en) * | 1996-10-16 | 1999-04-21 | Koninl Philips Electronics Nv | Testing control signals in A/D converters the invention relates to an integrated circuit containing an A/D converter and a test circuit |
GB9802091D0 (en) * | 1998-01-30 | 1998-03-25 | Sgs Thomson Microelectronics | Device scan testing |
US6333706B1 (en) | 1999-08-02 | 2001-12-25 | International Business Machines Corporation | Built-in self-test for analog to digital converter |
US7032151B2 (en) * | 2001-11-13 | 2006-04-18 | Georgia Tech Research Corporation | Systems and methods for testing integrated circuits |
AU2003223620A1 (en) * | 2002-05-01 | 2003-11-17 | Logicvision (Canada), Inc | Circuit and method for adding parametric test capability to digital boundary scan |
ATE366941T1 (de) * | 2003-07-09 | 2007-08-15 | Koninkl Philips Electronics Nv | Ic mit eingebauter karakteristikbestimmung |
US7599299B2 (en) * | 2004-04-30 | 2009-10-06 | Xilinx, Inc. | Dynamic reconfiguration of a system monitor (DRPORT) |
US7102555B2 (en) * | 2004-04-30 | 2006-09-05 | Xilinx, Inc. | Boundary-scan circuit used for analog and digital testing of an integrated circuit |
JPWO2006022026A1 (ja) * | 2004-08-26 | 2008-05-08 | テスト・リサーチ・ラボラトリーズ株式会社 | 半導体のテストシステム |
KR101138200B1 (ko) * | 2008-06-02 | 2012-05-10 | 가부시키가이샤 어드밴티스트 | 반도체 웨이퍼, 반도체 회로, 시험용 기판, 및 시험 시스템 |
US7969171B1 (en) | 2010-01-06 | 2011-06-28 | General Electric Company | Test circuit and system |
US9729163B1 (en) * | 2016-08-30 | 2017-08-08 | Qualcomm Incorporated | Apparatus and method for in situ analog signal diagnostic and debugging with calibrated analog-to-digital converter |
CN111045405A (zh) * | 2019-12-16 | 2020-04-21 | 上海新华控制技术集团科技有限公司 | 一种开关量转接输出端子板 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3305547A1 (de) * | 1983-02-18 | 1984-08-23 | Philips Patentverwaltung Gmbh, 2000 Hamburg | Schaltungsanordnung zum digitalen umwandeln eines analogen signals |
US4538269A (en) * | 1983-04-18 | 1985-08-27 | International Telephone And Telegraph Corporation | Programmable coding and decoding arrangement |
JPS60147659A (ja) * | 1984-01-13 | 1985-08-03 | Hitachi Ltd | 論理構造 |
US4872169A (en) * | 1987-03-06 | 1989-10-03 | Texas Instruments Incorporated | Hierarchical scan selection |
JPS63233384A (ja) * | 1987-03-20 | 1988-09-29 | Fujitsu Ltd | プリント板ユニツトの論理チエツク方法 |
US4922492A (en) * | 1988-05-13 | 1990-05-01 | National Semiconductor Corp. | Architecture and device for testable mixed analog and digital VLSI circuits |
NL8801362A (nl) * | 1988-05-27 | 1989-12-18 | Philips Nv | Elektronische module bevattende een eerste substraatelement met een funktioneel deel, alsmede een tweede substraatelement voor het testen van een interkonnektiefunktie, voet bevattende zo een tweede substraatelement, substraatelement te gebruiken als zo een tweede substraatelement en elektronisch apparaat bevattende een plaat met gedrukte bedrading en ten minste twee zulke elektronische modules. |
US5132974A (en) * | 1989-10-24 | 1992-07-21 | Silc Technologies, Inc. | Method and apparatus for designing integrated circuits for testability |
DE69124709T2 (de) * | 1990-03-15 | 1997-05-28 | At & T Corp | Eingebaute Selbstprüfung für Analog-Digitalumsetzer |
JP2627464B2 (ja) * | 1990-03-29 | 1997-07-09 | 三菱電機株式会社 | 集積回路装置 |
-
1990
- 1990-12-06 JP JP2400584A patent/JPH04212524A/ja active Pending
-
1991
- 1991-12-02 US US07/801,359 patent/US5225834A/en not_active Expired - Fee Related
- 1991-12-03 EP EP91120719A patent/EP0489394B1/en not_active Expired - Lifetime
- 1991-12-03 DE DE69126848T patent/DE69126848T2/de not_active Expired - Fee Related
- 1991-12-05 MY MYPI91002252A patent/MY115272A/en unknown
- 1991-12-06 KR KR1019910022315A patent/KR960003087B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0489394A2 (en) | 1992-06-10 |
US5225834A (en) | 1993-07-06 |
EP0489394B1 (en) | 1997-07-16 |
DE69126848T2 (de) | 1997-11-20 |
KR960003087B1 (ko) | 1996-03-04 |
EP0489394A3 (en) | 1993-06-23 |
MY115272A (en) | 2003-05-31 |
JPH04212524A (ja) | 1992-08-04 |
DE69126848D1 (de) | 1997-08-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |