KR920008789A - 반도체 정류장치와 그것을 이용하여 만든 전파 정류기 - Google Patents

반도체 정류장치와 그것을 이용하여 만든 전파 정류기 Download PDF

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KR920008789A
KR920008789A KR1019910017579A KR910017579A KR920008789A KR 920008789 A KR920008789 A KR 920008789A KR 1019910017579 A KR1019910017579 A KR 1019910017579A KR 910017579 A KR910017579 A KR 910017579A KR 920008789 A KR920008789 A KR 920008789A
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semiconductor
silica powder
resin layer
mass
parts
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가즈또요 나리따
요이찌 나까지마
히로시게 오끼노시마
타다시 노사까
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원본미기재
가부시기가이샤 히다찌 세이사꾸쇼
신에쯔 케미칼 가부시기가이샤
닛뽄 덴소 가부시기가이샤
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Abstract

내용 없음

Description

반도체 정류장치와 그것을 이용하여 만든 전파 정류기
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 정류장치의 일실시예를 나타내는 개략 단면도,
제2도는 본 발명의 반도체 정류장치의 다른 실시예를 나타내는 개략 단면도,
제3도는 본 발명의 반도체 정류장치의 또 다른 실시예를 나타내는 개략 단면도.

Claims (18)

  1. 반도체 정류 장치에 있어서, 금속용기와, 주표면이 상기 용기의 하측면에 접착된 pn접합된 반도체 칩과, 상기 반도체 칩이 다른 주표면에 접착된 리드와, 상기 반도체 칩의 노출부를 덮으며, 실리카 분말을 포함하는 수지부재로 구성되는 반도체 정류장치.
  2. 제1항에 있어서, 상기 실리콘 수지층은 수지의 100질량부에 대해서 실리카 분말의 40내지 120질량부가 조합되는 것을 특징으로 하는 반도체 정류장치.
  3. 제2항에 있어서, 상기 실리카 분말이 평균입자 크기는 2내지 6㎛인 것을 특징으로 하는 반도체 정류장치.
  4. 제1항에 있어서, 상기 수지부재는 상기 반도체 칩의 노출부를 덮으며 실리카 분말을 포함하는 실리콘 수지층과, 상기 실리콘 수지층에 적층된 에폭시 수지층으로 이루어진 것을 특징으로 하는 반도체 정류장치.
  5. 제4항에 있어서, 상기 실리콘 수지층은 실리콘 수지의 100질량부에 대하여 실리카 분말이 40내지 120질량부가 조합되는 것을 특징으로 하는 반도체 정류장치.
  6. 제5항에 있어서, 상기 실리카 분말이 평균입자 크기는 2내지 6㎛인 것을 특징으로 하는 반도체 정류장치.
  7. 제1항에 있어서, 상기 수지 부재는 상기 반도체 칩의 노출부를 덮는 폴리아미드 수지층과 상기 폴리아미드 수지층에 적층되며 실리카 분말을 포함하는 실리콘 수지층으로 구성되는 것을 특징으로 하는 반도체 정류장치.
  8. 제7항에 있어서, 상기 실리콘 수지층은 상기 실리콘 수지의 100질량부에 대해서 실리카 분말의 40내지 120질량부가 조성되는 것을 특징으로 하는 반도체 정류장치.
  9. 제8항에 있어서, 상기 실리카 분말의 평균입자 크기는 2내지 6㎛인 것을 특징으로 하는 반도체 정류장치.
  10. 전파 정류기에 있어서, 전기적 절연되며 D.C.측 단자로 이용되는 제1과 제2라디에이터와, 상기 제1라디에이터상에 유지된 금속용기로 각각이 형성되며, 반도체 칩이 접촉한 p와n층, 상기 금속용기의 하측면에 접착된 상기 p층, 상기 반도체 칩의 상기 n층에 접착된 리드, 그리고 상기 반도체 칩의 노출부를 덮는 수지부재로 구성되는 복수의 제1반도체 정류장치와, 상기 제2라디에이터상에 유지된 금속용기로 각각이 형성되며, 반도체 칩이 접촉하는 p와 n층, 상기 금속용기의 하측면에 접착된 상기 n층, 상기 반도체 칩의 상기 p층에 접착된 리드, 그리고 상기 반도체 칩의 노출부를 덮는 수지부재로 구성되는 복수의 제2반도체 정류장치와, 객수는 위상이 갯수와 동일하며, 상기 제1반도체 정류 장치의 상기 리드가 상기 제2반도체 정류장치의 상기 리드에 연결되는 복수의 A.C.측 단자로 이루어지는 전파 정류기.
  11. 제10항에 있어서, 상기 제1과 제2반도체 정류장치의 상기 실리콘 수지는 상기 실리콘 수지의 100질량부에 대해서 실리카 분말의 40내지 120질량부가 조성된 것을 특징으로 하는 전파정류기.
  12. 제11항에 있어서, 상기 제1과 제2반도체 정류장치의 상기 실리콘 수지층에 포함된 상기 실리카 분말의 평균입자 크기는 2내지 6㎛인 것을 특징으로 하는 전파정류기.
  13. 제10항에 있어서, 상기 수지부재가 상기 반도체 칩의 노출부를 덮는 폴리이미드수지층과 상기 폴리이미드 수지층에 적층되며 실리카 분말을 포함하는 실리콘 수지층으로 이루어진 것을 특징으로 하는 전파정류기.
  14. 제13항에 있어서, 상기 실리콘 수지층은 상기 실리콘 수지의 100질량부에 대하여 실리카 분말의 40내지 120질량부가 조성된 것을 특징으로 하는 전파정류기.
  15. 제14항에 있어서, 상기 실리카 분말의 평균입자 크기는 2내지 6㎛인 것을 특징으로 하는 전파정류기.
  16. 제10항에 있어서, 상기 수지부재는 상기 반도체 칩의 노출부를 덮으며 상기 실리콘 수지층상에 적층된 에폭시 수지층으로 구성된 것을 특징으로 하는 전파정류기.
  17. 제16항에 있어서, 상기 실리콘 수지층은 실리콘 수지의 100질량부에 대하여 실리카 분말의 40내지 120질량부가 조성된 것을 특징으로 하는 전파정류기.
  18. 제17항에 있어서, 상기 실리카 분말의 평균입자 크기는 2내지 6㎛인 것을 특징으로 하는 전파정류기.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910017579A 1990-10-08 1991-10-08 반도체 정류장치와 그것을 이용하여 만든 전파정류기 KR100193161B1 (ko)

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JP2270188A JP2858166B2 (ja) 1990-10-08 1990-10-08 半導体整流素子及びそれを使った全波整流装置
JP90-270188 1990-10-08

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EP (1) EP0480372B1 (ko)
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DE (1) DE69120366T2 (ko)

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KR100193161B1 (ko) 1999-06-15
EP0480372A1 (en) 1992-04-15
US5302856A (en) 1994-04-12
JPH04146655A (ja) 1992-05-20
DE69120366T2 (de) 1996-11-07
EP0480372B1 (en) 1996-06-19
DE69120366D1 (de) 1996-07-25
JP2858166B2 (ja) 1999-02-17

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