KR920005156A - S램용 메모리셀 - Google Patents

S램용 메모리셀 Download PDF

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Publication number
KR920005156A
KR920005156A KR1019900012013A KR900012013A KR920005156A KR 920005156 A KR920005156 A KR 920005156A KR 1019900012013 A KR1019900012013 A KR 1019900012013A KR 900012013 A KR900012013 A KR 900012013A KR 920005156 A KR920005156 A KR 920005156A
Authority
KR
South Korea
Prior art keywords
fets
fet
write
read
memory cell
Prior art date
Application number
KR1019900012013A
Other languages
English (en)
Other versions
KR940000894B1 (ko
Inventor
윤광준
이창석
박형무
성낙선
Original Assignee
경상현
재단법인 한국전자통신연구소
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 경상현, 재단법인 한국전자통신연구소 filed Critical 경상현
Priority to KR1019900012013A priority Critical patent/KR940000894B1/ko
Priority to US07/740,957 priority patent/US5243555A/en
Priority to JP3221028A priority patent/JPH0812758B2/ja
Priority to CN91105584A priority patent/CN1059802A/zh
Publication of KR920005156A publication Critical patent/KR920005156A/ko
Application granted granted Critical
Publication of KR940000894B1 publication Critical patent/KR940000894B1/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Vessels, Lead-In Wires, Accessory Apparatuses For Cathode-Ray Tubes (AREA)
  • Manufacture Of Electron Tubes, Discharge Lamp Vessels, Lead-In Wires, And The Like (AREA)

Abstract

내용 없음

Description

S램용 메모리셀
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명의 회로도.
제5도는 본 발명의 다른 실시예를 나타낸 회로도.

Claims (3)

  1. 두개의 부하저항(RL1),(RL2)(또는 두개의 부하 FET(JD1),(JD2)과 두개의 구동 FET(J1),(J2)에 의해 셀래치가 구성되는 메모리셀에 있어서, 셀래치에 저장된 데이타를 읽는 목적의 읽기FET(*J5),(J6)의 게이트는 셀래치의 인접한 구동FET(J1),(J2)의 게이트에 각각 연결하면서 소오스는 구동전원에 연결하고, 셀래치에 데이타를 쓰는 목적의 쓰기 FET(J3),(J4)의 게이트는 공히 쓰기 제어선에 연결하면서 소오스는 셀래치의 구동 FET(J5),(J6)의 드레인과 각각 연결되고 비트선과 셀래치를 연결하는 전달 FET(J7),(J8)의 게이트는 워드선에 연결하고, 드레인은 비트선 및 비트선에 연결하며 소오스는 읽기 FET(J5),(J6)의 쓰기 FET(J3),(J4)의 드레인에 각각 연결되어 구성됨을 특징으로 하는 S램용 메모리셀.
  2. 제1항에 있어서, 읽기 FET(J6), 쓰기FET(J4), 전달 FET(J8) 및 비트선을 없애고, 셀래치(RL1),(RL2),(J1),(J2),읽기 FET(J5), 쓰기 FET(J3), 전달 FET(J7)와 비트선 및 쓰기 제어선으로 구성하여 소자의 수를 줄이면서 간단한 구조를 갖도록 함을 특징으로하는 S램용 메모리셀.
  3. 제1항에 있어서, 전달 FET(J7),(J8)를 없애고 읽기 FET(J5),(J8)의 드레인과 쓰기 FET(J3),(J4)의 드레인을 비트선과 비트선에 각각 연결하고, 읽기 FET(J5),(J6)의 소오스를 워드선 구동 FET(J9)의 드레인에 연결하며 워드선 구동 FET(J9)의 게이트는 워드선에 연결하고 소오스는 전원(Vs)에 연결하여 구성됨을 특징으로 하는 S램용 메모리셀.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019900012013A 1990-08-06 1990-08-06 S램용 메모리셀 KR940000894B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019900012013A KR940000894B1 (ko) 1990-08-06 1990-08-06 S램용 메모리셀
US07/740,957 US5243555A (en) 1990-08-06 1991-08-06 Memory cell for use in a static random access memory
JP3221028A JPH0812758B2 (ja) 1990-08-06 1991-08-06 Ｓｒａｍ用メモリーセル
CN91105584A CN1059802A (zh) 1990-08-06 1991-08-08 带条形码的阴极射线管

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900012013A KR940000894B1 (ko) 1990-08-06 1990-08-06 S램용 메모리셀

Publications (2)

Publication Number Publication Date
KR920005156A true KR920005156A (ko) 1992-03-28
KR940000894B1 KR940000894B1 (ko) 1994-02-03

Family

ID=19302046

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900012013A KR940000894B1 (ko) 1990-08-06 1990-08-06 S램용 메모리셀

Country Status (4)

Country Link
US (1) US5243555A (ko)
JP (1) JPH0812758B2 (ko)
KR (1) KR940000894B1 (ko)
CN (1) CN1059802A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100452902B1 (ko) * 2000-07-10 2004-10-15 미쓰비시덴키 가부시키가이샤 기억 장치

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726932A (en) * 1996-06-13 1998-03-10 Taiwan Semiconductor Manufacturing Company, Ltd. Trench free SRAM cell structure
US5805496A (en) * 1996-12-27 1998-09-08 International Business Machines Corporation Four device SRAM cell with single bitline
US7385840B2 (en) * 2005-07-28 2008-06-10 Texas Instruments Incorporated SRAM cell with independent static noise margin, trip voltage, and read current optimization
JP4877094B2 (ja) * 2007-06-22 2012-02-15 日本テキサス・インスツルメンツ株式会社 半導体装置、半導体メモリ装置及び半導体メモリセル
JP2011014210A (ja) * 2009-07-06 2011-01-20 Hitachi Ulsi Systems Co Ltd 半導体装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4128773A (en) * 1977-11-07 1978-12-05 Hughes Aircraft Company Volatile/non-volatile logic latch circuit
JPS5827917B2 (ja) * 1978-05-04 1983-06-13 日本電信電話株式会社 Ｍｉｓ記憶回路
JPS601715B2 (ja) * 1978-06-26 1985-01-17 ソニー株式会社 メモリ回路
JPS6055914B2 (ja) * 1979-10-19 1985-12-07 株式会社東芝 半導体記憶装置
US4575821A (en) * 1983-05-09 1986-03-11 Rockwell International Corporation Low power, high speed random access memory circuit
EP0217307B1 (en) * 1985-09-30 1992-03-11 Honeywell Inc. Radiation hard memory cell
US4995000A (en) * 1988-07-01 1991-02-19 Vitesse Semiconductor Corporation Static RAM cell with high speed and stability

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100452902B1 (ko) * 2000-07-10 2004-10-15 미쓰비시덴키 가부시키가이샤 기억 장치

Also Published As

Publication number Publication date
KR940000894B1 (ko) 1994-02-03
CN1059802A (zh) 1992-03-25
JPH0812758B2 (ja) 1996-02-07
US5243555A (en) 1993-09-07
JPH06119782A (ja) 1994-04-28

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