KR910013426A - 디램의 트랜지스터 제조방법 - Google Patents

디램의 트랜지스터 제조방법 Download PDF

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Publication number
KR910013426A
KR910013426A KR1019890018826A KR890018826A KR910013426A KR 910013426 A KR910013426 A KR 910013426A KR 1019890018826 A KR1019890018826 A KR 1019890018826A KR 890018826 A KR890018826 A KR 890018826A KR 910013426 A KR910013426 A KR 910013426A
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KR
South Korea
Prior art keywords
oxide film
low temperature
trench
etched
polysilicon
Prior art date
Application number
KR1019890018826A
Other languages
English (en)
Other versions
KR0151119B1 (ko
Inventor
김성철
이영종
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019890018826A priority Critical patent/KR0151119B1/ko
Publication of KR910013426A publication Critical patent/KR910013426A/ko
Application granted granted Critical
Publication of KR0151119B1 publication Critical patent/KR0151119B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823468MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음.

Description

디램의 트랜지스터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 제조순서를 나타낸 단면도.

Claims (1)

  1. 기판(1)에 필드 산화막(2)을 형성한 후 정션 혈성을 위한 이온주입을 하고 저온산화막(3) 디포지션 후 저온 산화막(3)과 기판(1)을 식각하여 트랜치(4)를 형성하고 다시 저온 산화막(5) 디포지션후 이 저온 산화막(5)을 식각하여 트랜치(4)내에 측벽(6)을 형성하며 트랜치(4) 바닥에 게이트 산화막(7) 형성후 폴리 실리콘(8)을 디포지션하고 이 폴리실리콘(8)을 식각하여게이트(9)가 트랜치(4)를 오버랩되게 하고 저온 산화막(10) 디포지션후 식각하여 접촉창(11)을 형성한 다음 통상적 폴리 실리콘(12), 유전체(13), 폴리 실리콘(14)을 차례로 증착시켜서 된 디램의 트랜지스터의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890018826A 1989-12-18 1989-12-18 디램의 트랜지스터 제조방법 KR0151119B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890018826A KR0151119B1 (ko) 1989-12-18 1989-12-18 디램의 트랜지스터 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890018826A KR0151119B1 (ko) 1989-12-18 1989-12-18 디램의 트랜지스터 제조방법

Publications (2)

Publication Number Publication Date
KR910013426A true KR910013426A (ko) 1991-08-08
KR0151119B1 KR0151119B1 (ko) 1998-10-01

Family

ID=19293095

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890018826A KR0151119B1 (ko) 1989-12-18 1989-12-18 디램의 트랜지스터 제조방법

Country Status (1)

Country Link
KR (1) KR0151119B1 (ko)

Also Published As

Publication number Publication date
KR0151119B1 (ko) 1998-10-01

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