KR900017442A - 전기 전도성 패턴의 형성방법 - Google Patents

전기 전도성 패턴의 형성방법 Download PDF

Info

Publication number
KR900017442A
KR900017442A KR1019900005627A KR900005627A KR900017442A KR 900017442 A KR900017442 A KR 900017442A KR 1019900005627 A KR1019900005627 A KR 1019900005627A KR 900005627 A KR900005627 A KR 900005627A KR 900017442 A KR900017442 A KR 900017442A
Authority
KR
South Korea
Prior art keywords
powder
boron
lead
metal
rhodium
Prior art date
Application number
KR1019900005627A
Other languages
English (en)
Other versions
KR960006983B1 (ko
Inventor
두덱 디트마르
파이퍼 토마스
Original Assignee
원본미기재
이. 아이 듀우판 드 네모아 앤드 캄파니
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 원본미기재, 이. 아이 듀우판 드 네모아 앤드 캄파니 filed Critical 원본미기재
Publication of KR900017442A publication Critical patent/KR900017442A/ko
Application granted granted Critical
Publication of KR960006983B1 publication Critical patent/KR960006983B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/102—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding of conductive powder, i.e. metallic powder
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/28—Processing photosensitive materials; Apparatus therefor for obtaining powder images
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography
    • H05K2203/0525—Patterning by phototackifying or by photopatterning adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1131—Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal

Abstract

내용 없음.

Description

전기 전도성 패턴의 형성 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (9)

  1. (a) 기판상에 적어도 일시적으로 점착성인 패턴화된 접착제층을 형성하고, (b) 패턴화된 접착제층에 금속 함유 분말을 도포하고, (c) 금속함유 분말 비스무트, 카드륨, 납, 구리, 붕소, 로듐, 니켈, 인듐, 알루미늄 및 규소로 구성되는 군 중에서 선택된 보조 원소 또는 이 보조 원소들의 혼합물로 된 제 2 분말을 도포하고, (d) 접착제층을 제거하고 분말을 소결시키기에 충분한 시간 및 온도에서 패턴화된 기판을 소성하는 것으로 되는, 기판상에 전기 전도성 패턴을 형성하는 방법.
  2. 제1항에 있어서, 적어도 일시적으로 점착성인 층이 노광시 그 점착성이 변화되는 감광층인 것을 특징으로 하는 방법.
  3. 제2항에 있어서, 감광층이 1,4-디히드로피리딘 화합물을 함유하는 것을 특징으로 하는 방법.
  4. 제1항에 있어서, 금속 함유 분말이 보조 원소를 함유하지 않는 것을 특징으로 하는 방법.
  5. 제4항에 있어서, 금속이 순수한 금, 은, 백금, 팔라듐 및 구리, 이들의 혼합물 및 합금으로 구성되는 군 중에서 선택된 전도성 금속인 것을 특징으로 하는 방법.
  6. 제5항에 있어서, 제 2 분말 중의 보조 원소가 비스무트, 카드뮴, 납, 로듐, 구리, 니켈, 붕소, 알루미늄 및 규소로 구성되는 군 중에서 선택되는 것을 특징으로 하는 방법.
  7. 제6항에서 있어서, 제 2 분말이 금속성 비스무트, 카드뮴, 납, 붕소 및(또는) 로듐으로 구성되는 것을 특징으로 하는 방법.
  8. 제6항에 있어서 제 2 분말이 비스무트, 카드뮴, 납, 붕소 및(또는) 로듐의 산화물 또는 염을 함유하는 것을 특징으로 하는 방법.
  9. 제6항에 있어서, 제 2 분말이 규소, 납 알루미늄 및(또는) 붕소의 산화물을 함유하는 유리 분말인 것을 특징으로 하는 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900005627A 1989-04-21 1990-04-21 전기 전도성 패턴의 형성 방법 KR960006983B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
USP3913115.7 1989-04-21
US39131157 1989-04-21
DE3913115A DE3913115A1 (de) 1989-04-21 1989-04-21 Verfahren zur herstellung von elektrisch leitfaehigen mustern

Publications (2)

Publication Number Publication Date
KR900017442A true KR900017442A (ko) 1990-11-16
KR960006983B1 KR960006983B1 (ko) 1996-05-25

Family

ID=6379134

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900005627A KR960006983B1 (ko) 1989-04-21 1990-04-21 전기 전도성 패턴의 형성 방법

Country Status (6)

Country Link
US (1) US5110384A (ko)
EP (1) EP0394875A1 (ko)
JP (1) JPH03136293A (ko)
KR (1) KR960006983B1 (ko)
CA (1) CA2015094A1 (ko)
DE (1) DE3913115A1 (ko)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3913117A1 (de) * 1989-04-21 1990-10-25 Du Pont Deutschland Verfahren zur herstellung von elektrisch leitfaehigen mustern
DE3924518A1 (de) * 1989-07-25 1991-01-31 Haefele Umweltverfahrenstechik Temperatursensor und verfahren zu seiner herstellung
WO1991016805A1 (en) * 1990-04-16 1991-10-31 Denki Kagaku Kogyo Kabushiki Kaisha Ceramic circuit board
DE4113483C2 (de) * 1990-05-12 1995-10-26 Du Pont Deutschland Verfahren zur Erzeugung feiner Leiterbahnen auf einem keramischen Träger
DE4109363C2 (de) * 1991-03-22 2000-12-14 Bosch Gmbh Robert Klebverbindung zwischen einem elektronischen Bauteil und einem Substrat sowie Verfahren zur Herstellung der Klebverbindung
US5380390B1 (en) * 1991-06-10 1996-10-01 Ultimate Abras Systems Inc Patterned abrasive material and method
US5817204A (en) * 1991-06-10 1998-10-06 Ultimate Abrasive Systems, L.L.C. Method for making patterned abrasive material
IT1252474B (it) * 1991-07-31 1995-06-16 Proel Tecnologie Spa Metodo per la realizzazione di griglie di estrazione per la generazione di ioni e griglie realizzate secondo detto metodo
US6476487B2 (en) * 1992-10-30 2002-11-05 Showa Denko K.K. Solder circuit
US5556023A (en) * 1992-10-30 1996-09-17 Showa Denko K.K. Method of forming solder film
DE4240997C1 (de) * 1992-12-05 1994-06-01 Bosch Gmbh Robert Verfahren zur Herstellung von einfach zu bestückenden Leiterplatten
US5492725A (en) * 1994-11-23 1996-02-20 Gordon; Roy G. Process for chemical vapor deposition using precursor compounds containing hydropyridine ligands
US7052824B2 (en) * 2000-06-30 2006-05-30 E. I. Du Pont De Nemours And Company Process for thick film circuit patterning
DE10109087A1 (de) * 2001-02-24 2002-10-24 Leoni Bordnetz Sys Gmbh & Co Verfahren zum Herstellen eines Formbauteils mit einer integrierten Leiterbahn
CN100542692C (zh) * 2003-07-09 2009-09-23 福莱金属公司 包覆金属颗粒
TWI395256B (zh) * 2003-07-09 2013-05-01 Fry Metals Inc 沉積及形成圖形之方法
US20060009036A1 (en) * 2004-07-12 2006-01-12 Bacher Rudolph J High thermal cycle conductor system
US7413805B2 (en) * 2005-02-25 2008-08-19 Fry's Metals, Inc. Preparation of metallic particles for electrokinetic or electrostatic deposition
KR100824590B1 (ko) 2006-09-05 2008-04-23 삼성유리공업 주식회사 크리스탈아이스를 이용한 장식용 판유리 제조방법
WO2009135985A1 (en) * 2008-05-09 2009-11-12 Stora Enso Oyj An apparatus, a method for establishing a conductive pattern on a planar insulating substrate, the planar insulating substrate and a chipset thereof
JP5469830B2 (ja) * 2008-08-08 2014-04-16 太陽ホールディングス株式会社 パターンの形成方法、及び該方法に用いる感光性組成物
CN109076703A (zh) 2016-04-15 2018-12-21 3M创新有限公司 通过粘合剂转移制备电子电路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1107743B (de) * 1959-09-10 1961-05-31 Siemens Elektrogeraete Gmbh Verfahren zur Herstellung von gedruckten Schaltungen nach dem Pulververfahren
US3935366A (en) * 1972-04-27 1976-01-27 Electro Oxide Corporation Bonded gold article composition for bonding gold to a ceramic substrate utilizing copper oxide and cadium oxide
US4469625A (en) * 1980-02-25 1984-09-04 E. I. Du Pont De Nemours And Company Prolonged tack toners for the preparation of electric circuits
CA1155967A (en) * 1981-02-24 1983-10-25 Carl M. Anderson Medium film deposition of electric circuits
DE3429615C1 (de) * 1984-08-11 1985-12-12 Du Pont de Nemours (Deutschland) GmbH, 4000 Düsseldorf Verfahren zur Erzeugung von aus Pulvern bestehenden Mustern
US4631111A (en) * 1984-11-27 1986-12-23 E. I. Du Pont De Nemours And Company Dichromic process for preparation of conductive circuit
JPS61258242A (ja) * 1985-04-17 1986-11-15 Hitachi Ltd 感光性組成物及びそれを用いたパタ−ン形成方法
DE3540804C1 (de) * 1985-11-16 1987-04-16 Du Pont Deutschland Verfahren zur Herstellung von zur Vorlage negativen,aus mehreren verschiedenen Pulvern bestehenden Mustern
DE3540796C1 (de) * 1985-11-16 1987-04-16 Du Pont Deutschland Verfahren zur Herstellung von zur Vorlage positiven aus Pulvern bestehenden Mustern

Also Published As

Publication number Publication date
US5110384A (en) 1992-05-05
KR960006983B1 (ko) 1996-05-25
EP0394875A1 (de) 1990-10-31
JPH03136293A (ja) 1991-06-11
DE3913115A1 (de) 1990-10-25
DE3913115C2 (ko) 1991-02-28
CA2015094A1 (en) 1990-10-21

Similar Documents

Publication Publication Date Title
KR900017442A (ko) 전기 전도성 패턴의 형성방법
KR930004012A (ko) 후막/땜납 접합부의 형성 방법
IT8025049A0 (it) Procedimento e dispositivo per il ricupero di metalli preziosi da materiali bimetallici.
GB1378520A (en) Metallising pastes
ES507865A0 (es) Un metodo de electrodeposito de paladio metalico o de aleaciones de paladio sobre un sustrato.
GB1484435A (en) Electrical structures comprising solder barrier
KR830006781A (ko) 후막(厚膜)저항회로
KR900017444A (ko) 전기 전도성 패턴의 형성방법
KR900017443A (ko) 전기 전도성 패턴의 형성방법
KR840000623A (ko) 저항기 잉크
EP0072273A3 (en) Low temperature integrated circuit die attachment process
JPS57130443A (en) Substrate for hybrid integrated circuit
JPS5660038A (en) Semiconductor device
GB2002175A (en) Temperature sensitive elements
GB1368960A (en) Soldering electrical components to thick film circuits
JPS57154844A (en) Semiconductor element
JPS5324268A (en) Pro duction of semiconductor device and bonding wire for the same
JPS54113255A (en) Partial plating method of lead frame for semiconductor device
JPS6421943A (en) Semiconductor device
JPS57157148A (en) Dew condensation sensor circuit and manufacture thereof
JPS5322366A (en) Electronic part
JPS5466343A (en) Forming method for noble metal pattern
JPS5247765A (en) Printing method in cover glass for watches
GB1498637A (en) Circuit assemblies
GB1497583A (en) Thin film circuits

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
NORF Unpaid initial registration fee