KR900007682B1 - 반도체기판의 단차부 매립방법 - Google Patents

반도체기판의 단차부 매립방법 Download PDF

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Publication number
KR900007682B1
KR900007682B1 KR1019870010355A KR870010355A KR900007682B1 KR 900007682 B1 KR900007682 B1 KR 900007682B1 KR 1019870010355 A KR1019870010355 A KR 1019870010355A KR 870010355 A KR870010355 A KR 870010355A KR 900007682 B1 KR900007682 B1 KR 900007682B1
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KR
South Korea
Prior art keywords
film
stepped portion
layer
sio
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019870010355A
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English (en)
Korean (ko)
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KR880004562A (ko
Inventor
겐슈 후세
겐지 다데이와
이찌로오 나까오
히데아끼 시모다
Original Assignee
마쯔시다덴기산교 가부시기가이샤
다니이 아끼오
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Publication date
Application filed by 마쯔시다덴기산교 가부시기가이샤, 다니이 아끼오 filed Critical 마쯔시다덴기산교 가부시기가이샤
Publication of KR880004562A publication Critical patent/KR880004562A/ko
Application granted granted Critical
Publication of KR900007682B1 publication Critical patent/KR900007682B1/ko
Expired legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
    • H10P95/064—Planarisation of inorganic insulating materials involving a dielectric removal step the removal being chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations

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  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
KR1019870010355A 1986-09-19 1987-09-18 반도체기판의 단차부 매립방법 Expired KR900007682B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP223058 1986-09-19
JP61-223058 1986-09-19
JP61223058A JPS6377122A (ja) 1986-09-19 1986-09-19 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR880004562A KR880004562A (ko) 1988-06-07
KR900007682B1 true KR900007682B1 (ko) 1990-10-18

Family

ID=16792172

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870010355A Expired KR900007682B1 (ko) 1986-09-19 1987-09-18 반도체기판의 단차부 매립방법

Country Status (3)

Country Link
US (1) US4764483A (cg-RX-API-DMAC7.html)
JP (1) JPS6377122A (cg-RX-API-DMAC7.html)
KR (1) KR900007682B1 (cg-RX-API-DMAC7.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63202067A (ja) * 1987-02-17 1988-08-22 Mitsubishi Electric Corp 半導体装置の製造方法
US4810669A (en) * 1987-07-07 1989-03-07 Oki Electric Industry Co., Ltd. Method of fabricating a semiconductor device
KR0121297B1 (en) * 1992-04-16 1997-11-15 Fujitsu Ltd Semiconductor device and process of producing the same
JP2820187B2 (ja) * 1992-04-16 1998-11-05 三星電子 株式会社 半導体装置の製造方法
JPH09167753A (ja) * 1995-08-14 1997-06-24 Toshiba Corp 半導体基板の表面の平坦化方法とその装置
US5863828A (en) * 1996-09-25 1999-01-26 National Semiconductor Corporation Trench planarization technique
US6440644B1 (en) 1997-10-15 2002-08-27 Kabushiki Kaisha Toshiba Planarization method and system using variable exposure
JP4530296B2 (ja) 2008-04-09 2010-08-25 Ｎｅｃアクセステクニカ株式会社 角度可変構造
CN113410130B (zh) * 2021-06-15 2023-03-21 西安微电子技术研究所 一种沟槽填充介质后的平坦化回刻方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3976524A (en) * 1974-06-17 1976-08-24 Ibm Corporation Planarization of integrated circuit surfaces through selective photoresist masking
US4274909A (en) * 1980-03-17 1981-06-23 International Business Machines Corporation Method for forming ultra fine deep dielectric isolation
US4389281A (en) * 1980-12-16 1983-06-21 International Business Machines Corporation Method of planarizing silicon dioxide in semiconductor devices
SE8100161L (sv) * 1981-01-13 1982-07-14 Boliden Ab Pumpbar vattenreningskomposition innehallande jern(ii)sulfat och forfarande for dess framstellning
JPS57204135A (en) * 1981-06-10 1982-12-14 Toshiba Corp Manufacture of semiconductor device
JPS5848936A (ja) * 1981-09-10 1983-03-23 Fujitsu Ltd 半導体装置の製造方法
JPS58210634A (ja) * 1982-05-31 1983-12-07 Toshiba Corp 半導体装置の製造方法
JPS59129438A (ja) * 1983-01-14 1984-07-25 Toshiba Corp 半導体装置の製造方法
JPS59167030A (ja) * 1983-03-11 1984-09-20 Toshiba Corp 半導体装置の製造方法
US4662986A (en) * 1985-06-27 1987-05-05 Signetics Corporation Planarization method and technique for isolating semiconductor islands

Also Published As

Publication number Publication date
JPS6377122A (ja) 1988-04-07
JPH0410222B2 (cg-RX-API-DMAC7.html) 1992-02-24
KR880004562A (ko) 1988-06-07
US4764483A (en) 1988-08-16

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