KR900006007B1 - 디지탈신호 처리회로 - Google Patents
디지탈신호 처리회로 Download PDFInfo
- Publication number
- KR900006007B1 KR900006007B1 KR1019870001481A KR870001481A KR900006007B1 KR 900006007 B1 KR900006007 B1 KR 900006007B1 KR 1019870001481 A KR1019870001481 A KR 1019870001481A KR 870001481 A KR870001481 A KR 870001481A KR 900006007 B1 KR900006007 B1 KR 900006007B1
- Authority
- KR
- South Korea
- Prior art keywords
- bit data
- bit
- data
- adder
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49942—Significance control
- G06F7/49947—Rounding
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP86-36664 | 1986-02-21 | ||
| JP36664 | 1986-02-21 | ||
| JP61036664A JPS62194540A (ja) | 1986-02-21 | 1986-02-21 | ディジタル信号処理回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR870008276A KR870008276A (ko) | 1987-09-25 |
| KR900006007B1 true KR900006007B1 (ko) | 1990-08-20 |
Family
ID=12476123
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019870001481A Expired KR900006007B1 (ko) | 1986-02-21 | 1987-02-21 | 디지탈신호 처리회로 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US4853886A (enExample) |
| JP (1) | JPS62194540A (enExample) |
| KR (1) | KR900006007B1 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02227770A (ja) * | 1989-02-28 | 1990-09-10 | Nec Corp | 直交変換器 |
| US5055712A (en) * | 1990-04-05 | 1991-10-08 | National Semiconductor Corp. | Register file with programmable control, decode and/or data manipulation |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL215456A (enExample) * | 1957-03-16 | |||
| EP0086904B1 (de) * | 1982-02-18 | 1985-11-21 | Deutsche ITT Industries GmbH | Digitale Parallel-Rechenschaltung für positive und negative Binärzahlen |
| JPS5949640A (ja) * | 1982-09-16 | 1984-03-22 | Toshiba Corp | 乗算回路 |
| US4589084A (en) * | 1983-05-16 | 1986-05-13 | Rca Corporation | Apparatus for symmetrically truncating two's complement binary signals as for use with interleaved quadrature signals |
-
1986
- 1986-02-21 JP JP61036664A patent/JPS62194540A/ja active Granted
-
1987
- 1987-02-18 US US07/016,125 patent/US4853886A/en not_active Expired - Lifetime
- 1987-02-21 KR KR1019870001481A patent/KR900006007B1/ko not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0444288B2 (enExample) | 1992-07-21 |
| KR870008276A (ko) | 1987-09-25 |
| US4853886A (en) | 1989-08-01 |
| JPS62194540A (ja) | 1987-08-27 |
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| PA0109 | Patent application |
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