KR870008276A - 디지탈신호 처리회로 - Google Patents

디지탈신호 처리회로 Download PDF

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KR870008276A
KR870008276A KR870001481A KR870001481A KR870008276A KR 870008276 A KR870008276 A KR 870008276A KR 870001481 A KR870001481 A KR 870001481A KR 870001481 A KR870001481 A KR 870001481A KR 870008276 A KR870008276 A KR 870008276A
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South Korea
Prior art keywords
data
adder
significant bit
multiplication result
binary data
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KR870001481A
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KR900006007B1 (ko
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히로시 시게하라
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와타리 스기이치로
가부시키가이샤 도시바
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

내용 없음

Description

디지탈신호 처리회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 2 도는 본 발명의 제 1 실시예에 관한 디지탈신호 처리회로의 구성을 나타내는 블록도.
제 3 도는 제 2 도의 신호처리회로에서 반올림되기 이전의 신호(Z)와 반올림된 신호(Z′)와의 관계를 나타내는 특성도.
제 4 도는 본 발명의 제 2 실시예에 관한 디지탈신호 처리회로의 구성을 나타내는 블록도.

Claims (4)

  1. 승산결과의 오차를 개선하는 승산라운딩기능과 승산결과의 증폭기능을 구비하고 있는 디지탈신호 처리회로에 있어서,
    2의보수인 제 1 및 제 2 의 2진데이터를 승산한 후 실제 승산결과중 일정비트수의 하위비트를 버려서 사실상의 승산결과를 얻는 승산기와,
    상기 사실상의 승산결과중 최상위비트를 반전시켜 제 3 의 2진데이터의 하위비트로하고, 제 3 의 2진데이터의 상위비트를 상기 상산결과중 상위비트로하여 제어신호에 따라 2의보수인 제 3 의 2진데이터와 제 4 의 2진데이터를 가감산하는 가감산기 및,
    상기 가감산기가 상기 제어신호에 따라 가산모우드로 동작할 때에는 상기 사실상의 승산결과중 최상위 비트 데이터의 반전데이터를 상기 가감산기에 최하위비트 데이터로서 공급하고, 감산모우드로 동작할 때에는 상기 사실상의 승산결과중 최상위비트 데이터를 상기 가감산기에 최하위비트 데이터로서 공급하는 수단을 구비한 것을 특징으로 하는 디지탈신호 처리회로.
  2. 제 1 항에 있어서, 상기 가감사기로 공급되는 상기 최하위비트는 캐리입력임을 특징으로 하는 디지탈신호 처리회로.
  3. 승산결과의 오차를 개선하는 승산라운딩기능과 승산결과의 증폭기능을 구비하고 있는 디지탈신호 처리회로에 있어서,
    2의보수인 제 1 및 제 2 의 2진데이터를 승산하는 승산기와,
    상기 승산기의 승산결과중 하위비트를 논리화한 다음 상기 승산기의 승산결과중 최상위비트를 반전시킨 비트와 논리적하여 제 3 의 2진데이터의 하위비트로하고, 제 3 의 2진데이터의 상위비트를 상기 승산기의 승산결과중 상위비트로 하며 제어신호에 따라 2의보수인 제 3 의 2진데이터와 제 4 의 2진데이터를 가감산하는 가감산기 및,
    상기 가감산기가 상기 제어신호에 따라 가산모우드로 동작할 때에는 상기 논리적된 데이터를 상기 가감산기에 최하위비트 데이터로서 공급하고, 감산모우드로 동작할 때에는 상기 논리적된 데이터를 반전시켜 상기 가감산기에 최하위비트 데이터로서 공급하는 수단을 구비한 것을 특징으로 하는 디지탈신호 처리회로.
  4. 제 3 항에 있어서, 상기 가감산기로 공급되는 상기 최하위비트는 캐리입력임을 특징으로 하는 디지탈신호 처리회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019870001481A 1986-02-21 1987-02-21 디지탈신호 처리회로 KR900006007B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP86-36664 1986-02-21
JP36664 1986-02-21
JP61036664A JPS62194540A (ja) 1986-02-21 1986-02-21 ディジタル信号処理回路

Publications (2)

Publication Number Publication Date
KR870008276A true KR870008276A (ko) 1987-09-25
KR900006007B1 KR900006007B1 (ko) 1990-08-20

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ID=12476123

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Application Number Title Priority Date Filing Date
KR1019870001481A KR900006007B1 (ko) 1986-02-21 1987-02-21 디지탈신호 처리회로

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US (1) US4853886A (ko)
JP (1) JPS62194540A (ko)
KR (1) KR900006007B1 (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02227770A (ja) * 1989-02-28 1990-09-10 Nec Corp 直交変換器
US5055712A (en) * 1990-04-05 1991-10-08 National Semiconductor Corp. Register file with programmable control, decode and/or data manipulation
JP2526787Y2 (ja) * 1993-10-25 1997-02-19 小野谷機工株式会社 車両用移動式ジャッキ

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL113801C (ko) * 1957-03-16
DE3267489D1 (en) * 1982-02-18 1986-01-02 Itt Ind Gmbh Deutsche Digital parallel calculating circuit for positive and negative binary numbers
JPS5949640A (ja) * 1982-09-16 1984-03-22 Toshiba Corp 乗算回路
US4589084A (en) * 1983-05-16 1986-05-13 Rca Corporation Apparatus for symmetrically truncating two's complement binary signals as for use with interleaved quadrature signals

Also Published As

Publication number Publication date
JPS62194540A (ja) 1987-08-27
KR900006007B1 (ko) 1990-08-20
US4853886A (en) 1989-08-01
JPH0444288B2 (ko) 1992-07-21

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