KR890016660A - 리드프레임 - Google Patents

리드프레임 Download PDF

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Publication number
KR890016660A
KR890016660A KR1019890005547A KR890005547A KR890016660A KR 890016660 A KR890016660 A KR 890016660A KR 1019890005547 A KR1019890005547 A KR 1019890005547A KR 890005547 A KR890005547 A KR 890005547A KR 890016660 A KR890016660 A KR 890016660A
Authority
KR
South Korea
Prior art keywords
leadframe
resin
inflow hole
opening
resin inflow
Prior art date
Application number
KR1019890005547A
Other languages
English (en)
Inventor
미쓰하루 시미즈
미쓰요시 이마이
Original Assignee
가와다니 유끼마로
신고오덴기고오교오 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가와다니 유끼마로, 신고오덴기고오교오 가부시끼가이샤 filed Critical 가와다니 유끼마로
Publication of KR890016660A publication Critical patent/KR890016660A/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

내용 없음

Description

리드프레임
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 리드프레임의 평면도, 제2도 및 제3도는 각각 수지 유입구멍을 형성하는 공정을 나타낸 설명도, 제4도는 수지 유입구멍을 에칭가공에 의해서 형성한 경우의 설명도, 제5도는 수지 유입구멍에 수지가 유입고화된 상태를 나타낸 설명도, 제6도는 반도체 장치의 단면도.

Claims (1)

  1. 수지봉지형 반도체 장치에 사용되는 리드프레임에 있어서, 적어도 반도체 소자를 탑재하는 스테이지부이면에 수지 유입구멍을 갖고 이 수지 유입구멍의 개구부 단연부에 개구부의 안쪽으로 돌출한 돌출부를 갖는 것을 특징으로 하는 리드프레임.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890005547A 1988-04-29 1989-04-27 리드프레임 KR890016660A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63106738A JP2593912B2 (ja) 1988-04-29 1988-04-29 リードフレーム
JP63-106738 1988-04-29

Publications (1)

Publication Number Publication Date
KR890016660A true KR890016660A (ko) 1989-11-29

Family

ID=14441266

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890005547A KR890016660A (ko) 1988-04-29 1989-04-27 리드프레임

Country Status (2)

Country Link
JP (1) JP2593912B2 (ko)
KR (1) KR890016660A (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0575006A (ja) * 1991-09-18 1993-03-26 Fujitsu Ltd リードフレーム及び樹脂封止型半導体装置
US5293065A (en) * 1992-08-27 1994-03-08 Texas Instruments, Incorporated Lead frame having an outlet with a larger cross sectional area than the inlet

Also Published As

Publication number Publication date
JP2593912B2 (ja) 1997-03-26
JPH01278055A (ja) 1989-11-08

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A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application