KR880006697A - 다이나믹 랜덤 액세스 메모리 어레이 - Google Patents

다이나믹 랜덤 액세스 메모리 어레이 Download PDF

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Publication number
KR880006697A
KR880006697A KR860009912A KR860009912A KR880006697A KR 880006697 A KR880006697 A KR 880006697A KR 860009912 A KR860009912 A KR 860009912A KR 860009912 A KR860009912 A KR 860009912A KR 880006697 A KR880006697 A KR 880006697A
Authority
KR
South Korea
Prior art keywords
memory cell
bit line
cell array
random access
memory array
Prior art date
Application number
KR860009912A
Other languages
English (en)
Other versions
KR890003372B1 (ko
Inventor
전동수
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019860009912A priority Critical patent/KR890003372B1/ko
Priority to DE19873739804 priority patent/DE3739804A1/de
Priority to GB8727456A priority patent/GB2200004B/en
Priority to JP62294279A priority patent/JPS63155493A/ja
Publication of KR880006697A publication Critical patent/KR880006697A/ko
Application granted granted Critical
Publication of KR890003372B1 publication Critical patent/KR890003372B1/ko
Priority to SG74/91A priority patent/SG7491G/en
Priority to HK200/91A priority patent/HK20091A/xx

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4099—Dummy cell treatment; Reference voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음

Description

다이나믹 랜덤 액세스 메모리 어레이
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 디램 칩의 블럭도.
제3도는 본 발명에 따른 메모리셀 어레이의 회로도.
제4도는 제3도의 메모리 어레이의 평면 레이아웃의 도면.

Claims (3)

  1. 열 디코우더와 접속되는 비트라인(40)과, 행디코우더와 접속되는 워드라인(50)과, 상기 비트라인과 워드라인 사이에 접속이 되며 정보를 기억하는 메모리셀(11)과, 상기 행 디코우더와 열디코우더의 어드레스 지정에 의해 상기 메모리셀(11)에 기억된 정보를 감지하는 센스증폭기(10)를 구비하는 디램의 메모리쎌 어레이에 있어서, 상기 메모리셀 어레이의 외각 모서리에 설치되며 상기 센스증폭기(10)와는 접속이 되지않는 별도의 더미 비트라인(3)을 가짐을 특징으로 하는 메모리셀 어레이.
  2. 제1항에 있어서, 상기 더미 비트라인(3)이 반도체 기판과 접속되어 접지됨을 특징으로 하는 메모리셀 어레이.
  3. 제1항에 있어서, 상기 더미 비트라인(3)에 소정의 바이어스 전압이 공급됨을 특징으로 하는 메모리셀 어레이.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019860009912A 1986-11-24 1986-11-24 다이나믹 랜덤 액세스 메모리 어레이 KR890003372B1 (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019860009912A KR890003372B1 (ko) 1986-11-24 1986-11-24 다이나믹 랜덤 액세스 메모리 어레이
DE19873739804 DE3739804A1 (de) 1986-11-24 1987-11-24 Dynamische speichergruppierung mit wahlfreiem zugriff
GB8727456A GB2200004B (en) 1986-11-24 1987-11-24 Dynamic random access memory array
JP62294279A JPS63155493A (ja) 1986-11-24 1987-11-24 ダイナミックランダムアクセスメモリアレイ
SG74/91A SG7491G (en) 1986-11-24 1991-02-12 Dynamic random access memory array
HK200/91A HK20091A (en) 1986-11-24 1991-03-21 Dynamic random access memory array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860009912A KR890003372B1 (ko) 1986-11-24 1986-11-24 다이나믹 랜덤 액세스 메모리 어레이

Publications (2)

Publication Number Publication Date
KR880006697A true KR880006697A (ko) 1988-07-23
KR890003372B1 KR890003372B1 (ko) 1989-09-19

Family

ID=19253555

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860009912A KR890003372B1 (ko) 1986-11-24 1986-11-24 다이나믹 랜덤 액세스 메모리 어레이

Country Status (6)

Country Link
JP (1) JPS63155493A (ko)
KR (1) KR890003372B1 (ko)
DE (1) DE3739804A1 (ko)
GB (1) GB2200004B (ko)
HK (1) HK20091A (ko)
SG (1) SG7491G (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2534700B2 (ja) * 1987-04-02 1996-09-18 日本電気株式会社 半導体記憶装置
JPH0261889A (ja) * 1988-08-25 1990-03-01 Nec Corp 半導体メモリ
JP2650377B2 (ja) * 1988-12-13 1997-09-03 富士通株式会社 半導体集積回路
KR100223890B1 (ko) * 1996-12-31 1999-10-15 구본준 반도체 메모리 소자 및 그의 제조 방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58111183A (ja) * 1981-12-25 1983-07-02 Hitachi Ltd ダイナミツクｒａｍ集積回路装置
JPH0760858B2 (ja) * 1984-10-26 1995-06-28 三菱電機株式会社 半導体メモリ装置
JPS61194771A (ja) * 1985-02-25 1986-08-29 Hitachi Ltd 半導体記憶装置
JPH0666442B2 (ja) * 1985-03-08 1994-08-24 三菱電機株式会社 半導体メモリ装置

Also Published As

Publication number Publication date
HK20091A (en) 1991-03-28
DE3739804A1 (de) 1988-06-23
SG7491G (en) 1991-04-05
GB8727456D0 (en) 1987-12-23
KR890003372B1 (ko) 1989-09-19
JPS63155493A (ja) 1988-06-28
GB2200004A (en) 1988-07-20
GB2200004B (en) 1990-09-26

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