KR20200120750A - Pecvd에 의한 si 갭 충전을 위한 방법 - Google Patents

Pecvd에 의한 si 갭 충전을 위한 방법 Download PDF

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KR20200120750A
KR20200120750A KR1020207028877A KR20207028877A KR20200120750A KR 20200120750 A KR20200120750 A KR 20200120750A KR 1020207028877 A KR1020207028877 A KR 1020207028877A KR 20207028877 A KR20207028877 A KR 20207028877A KR 20200120750 A KR20200120750 A KR 20200120750A
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South Korea
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amorphous silicon
silicon layer
way
depositing
substrate
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KR1020207028877A
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Korean (ko)
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신 리우
페이 왕
루이 쳉
아비지트 바수 말릭
로버트 잔 비저
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어플라이드 머티어리얼스, 인코포레이티드
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Publication of KR20200120750A publication Critical patent/KR20200120750A/ko

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    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/01—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes on temporary substrates, e.g. substrates subsequently removed by etching
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • C23C16/45536—Use of plasma, radiation or electromagnetic fields
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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  • Engineering & Computer Science (AREA)
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  • Manufacturing & Machinery (AREA)
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  • Electromagnetism (AREA)
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  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
  • Chemical Vapour Deposition (AREA)
KR1020207028877A 2018-03-09 2019-03-07 Pecvd에 의한 si 갭 충전을 위한 방법 KR20200120750A (ko)

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US201862640853P 2018-03-09 2018-03-09
US62/640,853 2018-03-09
PCT/US2019/021205 WO2019173624A1 (en) 2018-03-09 2019-03-07 A method for si gap fill by pecvd

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US (2) US11361991B2 (ja)
JP (2) JP7319288B2 (ja)
KR (1) KR20200120750A (ja)
CN (1) CN112335032A (ja)
SG (1) SG11202008150VA (ja)
WO (1) WO2019173624A1 (ja)

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KR20200120750A (ko) * 2018-03-09 2020-10-21 어플라이드 머티어리얼스, 인코포레이티드 Pecvd에 의한 si 갭 충전을 위한 방법

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4569701A (en) * 1984-04-05 1986-02-11 At&T Bell Laboratories Technique for doping from a polysilicon transfer layer
US4676847A (en) * 1985-01-25 1987-06-30 American Telephone And Telegraph Company At&T Bell Laboratories Controlled boron doping of silicon
JP3222615B2 (ja) * 1993-03-31 2001-10-29 株式会社東芝 表面処理装置
JP2565131B2 (ja) * 1994-04-22 1996-12-18 日本電気株式会社 半導体装置の製造方法
JP2636796B2 (ja) * 1995-05-24 1997-07-30 日本電気株式会社 半導体装置の製造方法
US20030162363A1 (en) 2002-02-22 2003-08-28 Hua Ji HDP CVD process for void-free gap fill of a high aspect ratio trench
US6802944B2 (en) * 2002-10-23 2004-10-12 Applied Materials, Inc. High density plasma CVD process for gapfill into high aspect ratio features
KR101758944B1 (ko) 2009-12-09 2017-07-18 노벨러스 시스템즈, 인코포레이티드 신규한 갭 충진 집적화
JP5692763B2 (ja) * 2010-05-20 2015-04-01 東京エレクトロン株式会社 シリコン膜の形成方法およびその形成装置
US10011920B2 (en) * 2011-02-23 2018-07-03 International Business Machines Corporation Low-temperature selective epitaxial growth of silicon for device integration
US8940388B2 (en) * 2011-03-02 2015-01-27 Micron Technology, Inc. Insulative elements
US20140186544A1 (en) 2013-01-02 2014-07-03 Applied Materials, Inc. Metal processing using high density plasma
US8921235B2 (en) * 2013-03-04 2014-12-30 Applied Materials, Inc. Controlled air gap formation
JP6267374B2 (ja) * 2013-07-31 2018-01-24 東京エレクトロン株式会社 シリコン膜の成膜方法
CN105336670B (zh) * 2014-07-14 2018-07-10 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
JP6392683B2 (ja) * 2015-02-18 2018-09-19 東京エレクトロン株式会社 凹部を充填する方法及び処理装置
US9565488B2 (en) * 2015-05-20 2017-02-07 Infineon Technologies Ag Micro-electro-mechanical system devices
TWI715645B (zh) 2015-10-22 2021-01-11 美商應用材料股份有限公司 正形及縫隙填充非晶矽薄膜的沉積
WO2017161236A1 (en) 2016-03-17 2017-09-21 Applied Materials, Inc. Methods for gapfill in high aspect ratio structures
KR20190011817A (ko) 2016-06-25 2019-02-07 어플라이드 머티어리얼스, 인코포레이티드 갭충전 애플리케이션들을 위한 유동가능 비정질 실리콘 막들
JP6606476B2 (ja) * 2016-08-02 2019-11-13 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、基板処理装置およびプログラム
KR20200120750A (ko) * 2018-03-09 2020-10-21 어플라이드 머티어리얼스, 인코포레이티드 Pecvd에 의한 si 갭 충전을 위한 방법

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US11848232B2 (en) 2023-12-19
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