KR20190046879A - 20nm 미만의 핀 피치를 위한 신규한 자기-정렬된 쿼드러플 패터닝 프로세스 - Google Patents

20nm 미만의 핀 피치를 위한 신규한 자기-정렬된 쿼드러플 패터닝 프로세스 Download PDF

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KR20190046879A
KR20190046879A KR1020197007671A KR20197007671A KR20190046879A KR 20190046879 A KR20190046879 A KR 20190046879A KR 1020197007671 A KR1020197007671 A KR 1020197007671A KR 20197007671 A KR20197007671 A KR 20197007671A KR 20190046879 A KR20190046879 A KR 20190046879A
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South Korea
Prior art keywords
sidewall spacers
pin
forming
fins
pitch
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English (en)
Korean (ko)
Inventor
스탠리 송
제프리 수
다 양
컨 림
초 페이 예프
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퀄컴 인코포레이티드
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    • H01L29/66795—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H01L21/3065—
    • H01L21/31116—
    • H01L21/823807—
    • H01L21/823821—
    • H01L29/1037—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/292—Non-planar channels of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0193—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/853—Complementary IGFETs, e.g. CMOS comprising FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
KR1020197007671A 2016-09-20 2017-08-08 20nm 미만의 핀 피치를 위한 신규한 자기-정렬된 쿼드러플 패터닝 프로세스 Ceased KR20190046879A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/271,043 US10559501B2 (en) 2016-09-20 2016-09-20 Self-aligned quadruple patterning process for Fin pitch below 20nm
US15/271,043 2016-09-20
PCT/US2017/045966 WO2018057141A1 (en) 2016-09-20 2017-08-08 Novel self-aligned quadruple patterning process for fin pitch below 20nm

Publications (1)

Publication Number Publication Date
KR20190046879A true KR20190046879A (ko) 2019-05-07

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KR1020197007671A Ceased KR20190046879A (ko) 2016-09-20 2017-08-08 20nm 미만의 핀 피치를 위한 신규한 자기-정렬된 쿼드러플 패터닝 프로세스

Country Status (7)

Country Link
US (2) US10559501B2 (https=)
EP (1) EP3516695A1 (https=)
JP (1) JP2019530229A (https=)
KR (1) KR20190046879A (https=)
CN (1) CN109716528A (https=)
BR (1) BR112019005093A2 (https=)
WO (1) WO2018057141A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10763118B2 (en) 2018-07-11 2020-09-01 International Business Machines Corporation Cyclic selective deposition for tight pitch patterning
KR102760190B1 (ko) 2019-05-16 2025-01-23 삼성전자주식회사 반도체 장치 및 그 제조 방법
US11257681B2 (en) 2019-07-17 2022-02-22 International Business Machines Corporation Using a same mask for direct print and self-aligned double patterning of nanosheets

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US6762448B1 (en) * 2003-04-03 2004-07-13 Advanced Micro Devices, Inc. FinFET device with multiple fin structures
US7638381B2 (en) * 2005-10-07 2009-12-29 International Business Machines Corporation Methods for fabricating a semiconductor structure using a mandrel and semiconductor structures formed thereby
US8669186B2 (en) 2012-01-26 2014-03-11 Globalfoundries Inc. Methods of forming SRAM devices using sidewall image transfer techniques
KR101823105B1 (ko) * 2012-03-19 2018-01-30 삼성전자주식회사 전계 효과 트랜지스터의 형성 방법
US8492228B1 (en) * 2012-07-12 2013-07-23 International Business Machines Corporation Field effect transistor devices having thick gate dielectric layers and thin gate dielectric layers
US9093556B2 (en) 2012-08-21 2015-07-28 Stmicroelectronics, Inc. Multi-fin FINFET device including epitaxial growth barrier on outside surfaces of outermost fins and related methods
WO2014088918A1 (en) * 2012-12-03 2014-06-12 Applied Materials, Inc Semiconductor device processing tools and methods for patterning substrates
US9123654B2 (en) 2013-02-15 2015-09-01 International Business Machines Corporation Trilayer SIT process with transfer layer for FINFET patterning
US9040371B2 (en) 2013-08-07 2015-05-26 International Business Machines Corporation Integration of dense and variable pitch fin structures
CN104347421A (zh) * 2013-08-07 2015-02-11 中芯国际集成电路制造(北京)有限公司 鳍式场效应管的形成方法
WO2015025441A1 (ja) * 2013-08-23 2015-02-26 パナソニック株式会社 半導体集積回路装置
US9171764B2 (en) * 2013-12-13 2015-10-27 GlobalFoundries, Inc. Methods for fabricating integrated circuits using self-aligned quadruple patterning
US9391141B2 (en) 2014-02-24 2016-07-12 Imec Vzw Method for producing fin structures of a semiconductor device in a substrate
JP6227466B2 (ja) * 2014-04-14 2017-11-08 株式会社日立ハイテクノロジーズ 荷電粒子線装置および検査装置
US9209038B2 (en) 2014-05-02 2015-12-08 GlobalFoundries, Inc. Methods for fabricating integrated circuits using self-aligned quadruple patterning
US20150372107A1 (en) 2014-06-18 2015-12-24 Stmicroelectronics, Inc. Semiconductor devices having fins, and methods of forming semiconductor devices having fins
TWI540650B (zh) 2014-08-06 2016-07-01 聯華電子股份有限公司 鰭狀場效電晶體元件製造方法
US9209279B1 (en) 2014-09-12 2015-12-08 Applied Materials, Inc. Self aligned replacement fin formation
US9530701B2 (en) 2014-12-18 2016-12-27 International Business Machines Corporation Method of forming semiconductor fins on SOI substrate
US9472414B2 (en) * 2015-02-13 2016-10-18 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned multiple spacer patterning process
JP6502705B2 (ja) * 2015-03-03 2019-04-17 キヤノン株式会社 形成方法
US9287135B1 (en) 2015-05-26 2016-03-15 International Business Machines Corporation Sidewall image transfer process for fin patterning
US9640633B1 (en) * 2015-12-18 2017-05-02 International Business Machines Corporation Self aligned gate shape preventing void formation
US9793271B1 (en) * 2016-04-29 2017-10-17 International Business Machines Corporation Semiconductor device with different fin pitches
US9806155B1 (en) * 2016-05-05 2017-10-31 International Business Machines Corporation Split fin field effect transistor enabling back bias on fin type field effect transistors

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Publication number Publication date
US20200161189A1 (en) 2020-05-21
US20180082906A1 (en) 2018-03-22
JP2019530229A (ja) 2019-10-17
US10559501B2 (en) 2020-02-11
WO2018057141A1 (en) 2018-03-29
BR112019005093A2 (pt) 2019-06-04
CN109716528A (zh) 2019-05-03
EP3516695A1 (en) 2019-07-31

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