CN109716528A - 用于小于20nm的鳍间距的新的自对准四重图案化工艺 - Google Patents

用于小于20nm的鳍间距的新的自对准四重图案化工艺 Download PDF

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Publication number
CN109716528A
CN109716528A CN201780057284.XA CN201780057284A CN109716528A CN 109716528 A CN109716528 A CN 109716528A CN 201780057284 A CN201780057284 A CN 201780057284A CN 109716528 A CN109716528 A CN 109716528A
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China
Prior art keywords
fin
sidewall spacer
mandrel
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Pending
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CN201780057284.XA
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English (en)
Chinese (zh)
Inventor
S·宋
J·徐
杨达
K·雷姆
C·F·耶普
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Qualcomm Inc
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Qualcomm Inc
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Publication of CN109716528A publication Critical patent/CN109716528A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/292—Non-planar channels of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0193—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/853—Complementary IGFETs, e.g. CMOS comprising FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
CN201780057284.XA 2016-09-20 2017-08-08 用于小于20nm的鳍间距的新的自对准四重图案化工艺 Pending CN109716528A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/271,043 US10559501B2 (en) 2016-09-20 2016-09-20 Self-aligned quadruple patterning process for Fin pitch below 20nm
US15/271,043 2016-09-20
PCT/US2017/045966 WO2018057141A1 (en) 2016-09-20 2017-08-08 Novel self-aligned quadruple patterning process for fin pitch below 20nm

Publications (1)

Publication Number Publication Date
CN109716528A true CN109716528A (zh) 2019-05-03

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780057284.XA Pending CN109716528A (zh) 2016-09-20 2017-08-08 用于小于20nm的鳍间距的新的自对准四重图案化工艺

Country Status (7)

Country Link
US (2) US10559501B2 (https=)
EP (1) EP3516695A1 (https=)
JP (1) JP2019530229A (https=)
KR (1) KR20190046879A (https=)
CN (1) CN109716528A (https=)
BR (1) BR112019005093A2 (https=)
WO (1) WO2018057141A1 (https=)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10763118B2 (en) 2018-07-11 2020-09-01 International Business Machines Corporation Cyclic selective deposition for tight pitch patterning
KR102760190B1 (ko) 2019-05-16 2025-01-23 삼성전자주식회사 반도체 장치 및 그 제조 방법
US11257681B2 (en) 2019-07-17 2022-02-22 International Business Machines Corporation Using a same mask for direct print and self-aligned double patterning of nanosheets

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CN103915332A (zh) * 2013-01-08 2014-07-09 中芯国际集成电路制造(上海)有限公司 图案的形成方法
TW201428824A (zh) * 2012-12-03 2014-07-16 應用材料股份有限公司 半導體裝置處理工具及用於將基板型樣化的方法
CN104347421A (zh) * 2013-08-07 2015-02-11 中芯国际集成电路制造(北京)有限公司 鳍式场效应管的形成方法
US20160181164A1 (en) * 2014-12-18 2016-06-23 International Business Machines Corporation Fin formation on an insulating layer
US20160240386A1 (en) * 2015-02-13 2016-08-18 Taiwan Semiconductor Manufacturing Company, Ltd. Self-Aligned Multiple Spacer Patterning Process

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US6762448B1 (en) * 2003-04-03 2004-07-13 Advanced Micro Devices, Inc. FinFET device with multiple fin structures
US7638381B2 (en) * 2005-10-07 2009-12-29 International Business Machines Corporation Methods for fabricating a semiconductor structure using a mandrel and semiconductor structures formed thereby
US8669186B2 (en) 2012-01-26 2014-03-11 Globalfoundries Inc. Methods of forming SRAM devices using sidewall image transfer techniques
KR101823105B1 (ko) * 2012-03-19 2018-01-30 삼성전자주식회사 전계 효과 트랜지스터의 형성 방법
US8492228B1 (en) * 2012-07-12 2013-07-23 International Business Machines Corporation Field effect transistor devices having thick gate dielectric layers and thin gate dielectric layers
US9093556B2 (en) 2012-08-21 2015-07-28 Stmicroelectronics, Inc. Multi-fin FINFET device including epitaxial growth barrier on outside surfaces of outermost fins and related methods
US9123654B2 (en) 2013-02-15 2015-09-01 International Business Machines Corporation Trilayer SIT process with transfer layer for FINFET patterning
US9040371B2 (en) 2013-08-07 2015-05-26 International Business Machines Corporation Integration of dense and variable pitch fin structures
WO2015025441A1 (ja) * 2013-08-23 2015-02-26 パナソニック株式会社 半導体集積回路装置
US9171764B2 (en) * 2013-12-13 2015-10-27 GlobalFoundries, Inc. Methods for fabricating integrated circuits using self-aligned quadruple patterning
US9391141B2 (en) 2014-02-24 2016-07-12 Imec Vzw Method for producing fin structures of a semiconductor device in a substrate
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TW201428824A (zh) * 2012-12-03 2014-07-16 應用材料股份有限公司 半導體裝置處理工具及用於將基板型樣化的方法
CN103915332A (zh) * 2013-01-08 2014-07-09 中芯国际集成电路制造(上海)有限公司 图案的形成方法
CN104347421A (zh) * 2013-08-07 2015-02-11 中芯国际集成电路制造(北京)有限公司 鳍式场效应管的形成方法
US20160181164A1 (en) * 2014-12-18 2016-06-23 International Business Machines Corporation Fin formation on an insulating layer
US20160240386A1 (en) * 2015-02-13 2016-08-18 Taiwan Semiconductor Manufacturing Company, Ltd. Self-Aligned Multiple Spacer Patterning Process

Also Published As

Publication number Publication date
US20200161189A1 (en) 2020-05-21
US20180082906A1 (en) 2018-03-22
KR20190046879A (ko) 2019-05-07
JP2019530229A (ja) 2019-10-17
US10559501B2 (en) 2020-02-11
WO2018057141A1 (en) 2018-03-29
BR112019005093A2 (pt) 2019-06-04
EP3516695A1 (en) 2019-07-31

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Application publication date: 20190503