KR20180092804A - 레벨 시프터 - Google Patents

레벨 시프터 Download PDF

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Publication number
KR20180092804A
KR20180092804A KR1020170160440A KR20170160440A KR20180092804A KR 20180092804 A KR20180092804 A KR 20180092804A KR 1020170160440 A KR1020170160440 A KR 1020170160440A KR 20170160440 A KR20170160440 A KR 20170160440A KR 20180092804 A KR20180092804 A KR 20180092804A
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KR
South Korea
Prior art keywords
power supply
output node
supply line
level
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020170160440A
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English (en)
Korean (ko)
Inventor
가오루 사카구치
Original Assignee
에이블릭 가부시키가이샤
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Application filed by 에이블릭 가부시키가이샤 filed Critical 에이블릭 가부시키가이샤
Publication of KR20180092804A publication Critical patent/KR20180092804A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
KR1020170160440A 2017-02-09 2017-11-28 레벨 시프터 Withdrawn KR20180092804A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017022483A JP2018129727A (ja) 2017-02-09 2017-02-09 レベルシフタ
JPJP-P-2017-022483 2017-02-09

Publications (1)

Publication Number Publication Date
KR20180092804A true KR20180092804A (ko) 2018-08-20

Family

ID=63037987

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020170160440A Withdrawn KR20180092804A (ko) 2017-02-09 2017-11-28 레벨 시프터

Country Status (5)

Country Link
US (1) US10418997B2 (https=)
JP (1) JP2018129727A (https=)
KR (1) KR20180092804A (https=)
CN (1) CN108418576A (https=)
TW (1) TWI713800B (https=)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023038314A1 (ko) * 2021-09-09 2023-03-16 광운대학교 산학협력단 에너지 효율 및 입력전압의 범위를 개선한 레벨 시프터

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US10986154B2 (en) * 2016-05-16 2021-04-20 Glide Talk Ltd. System and method for interleaved media communication and conversion
CN112073048B (zh) * 2020-09-02 2022-11-04 敦泰电子（深圳）有限公司 电平移位电路
CN112311207A (zh) * 2020-11-17 2021-02-02 北京集创北方科技股份有限公司 电压转换装置、电源芯片及电子设备
CN113078896B (zh) * 2021-02-24 2024-08-23 广州安凯微电子股份有限公司 一种低输入电源幅度的电平转换电路
US11855630B2 (en) 2022-05-31 2023-12-26 Texas Instruments Incorporated Floating high-voltage level translator with adaptive bypass circuit
CN117318697B (zh) * 2023-09-15 2024-06-14 辰芯半导体（深圳）有限公司 电平移位电路和电源设备

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JP5361685B2 (ja) * 2009-12-01 2013-12-04 株式会社東芝 半導体集積回路
JP5491319B2 (ja) * 2010-08-16 2014-05-14 ルネサスエレクトロニクス株式会社 表示ドライバ回路
JP2013131964A (ja) * 2011-12-22 2013-07-04 Renesas Electronics Corp レベルシフト回路及び表示装置の駆動回路
JP5838141B2 (ja) * 2012-02-27 2015-12-24 ルネサスエレクトロニクス株式会社 半導体集積回路
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JP5853104B2 (ja) * 2012-08-01 2016-02-09 ルネサスエレクトロニクス株式会社 レベルシフト回路
US9197200B2 (en) * 2013-05-16 2015-11-24 Dialog Semiconductor Gmbh Dynamic level shifter circuit
US9374090B2 (en) * 2013-06-11 2016-06-21 Agency For Science, Technology And Research Circuit arrangement and method of operating the same
JP2015012351A (ja) * 2013-06-27 2015-01-19 マイクロン テクノロジー， インク． 半導体装置
US9537478B2 (en) * 2014-03-06 2017-01-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9577626B2 (en) * 2014-08-07 2017-02-21 Skyworks Solutions, Inc. Apparatus and methods for controlling radio frequency switches
US9509308B2 (en) * 2014-09-30 2016-11-29 Synaptics Incorporated Supply-modulation cross domain data interface
US9257973B1 (en) * 2014-11-04 2016-02-09 Texas Instruments Incorporated Supply-state-enabled level shifter interface circuit and method
US9385722B2 (en) * 2014-11-25 2016-07-05 Intel Corporation Voltage level shifter circuit
US9490780B2 (en) * 2014-12-18 2016-11-08 Intel Corporation Apparatuses, methods, and systems for dense circuitry using tunnel field effect transistors
TWM517481U (zh) * 2015-05-21 2016-02-11 修平學校財團法人修平科技大學 電壓位準轉換器
US9917588B2 (en) * 2015-07-08 2018-03-13 Nxp B.V. Level shifter and approach therefor
US9954527B2 (en) * 2015-09-29 2018-04-24 Nvidia Corporation Balanced charge-recycling repeater link
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DE102016109114B4 (de) * 2016-05-18 2025-06-18 Infineon Technologies Ag Pegelwandler-Schaltkreis, sowie Messanordnung und Chip mit einem solchen Pegelwandler-Schaltkreis

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001036398A (ja) 1999-07-16 2001-02-09 Matsushita Electric Ind Co Ltd レベルシフタ回路
JP2013187712A (ja) 2012-03-07 2013-09-19 Renesas Electronics Corp レベルシフタ回路及び半導体集積回路並びにレベルシフタ回路の制御方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023038314A1 (ko) * 2021-09-09 2023-03-16 광운대학교 산학협력단 에너지 효율 및 입력전압의 범위를 개선한 레벨 시프터

Also Published As

Publication number Publication date
US10418997B2 (en) 2019-09-17
US20180226971A1 (en) 2018-08-09
JP2018129727A (ja) 2018-08-16
CN108418576A (zh) 2018-08-17
TWI713800B (zh) 2020-12-21
TW201830861A (zh) 2018-08-16

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Patent event date: 20171128

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Patent event date: 20200610

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Patent event code: PC12021R01D

Patent event date: 20201119

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