KR20080080538A - 데이터 송신 버스에 액세스하는 방법, 대응하는 디바이스및 시스템 - Google Patents
데이터 송신 버스에 액세스하는 방법, 대응하는 디바이스및 시스템 Download PDFInfo
- Publication number
- KR20080080538A KR20080080538A KR1020087014190A KR20087014190A KR20080080538A KR 20080080538 A KR20080080538 A KR 20080080538A KR 1020087014190 A KR1020087014190 A KR 1020087014190A KR 20087014190 A KR20087014190 A KR 20087014190A KR 20080080538 A KR20080080538 A KR 20080080538A
- Authority
- KR
- South Korea
- Prior art keywords
- bus
- access
- peripheral device
- master
- master peripheral
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/366—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using a centralised polling arbiter
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0553872A FR2894696A1 (fr) | 2005-12-14 | 2005-12-14 | Procede d'acces a un bus de transmission de donnees, dispositif et systeme correspondant |
| FR0553872 | 2005-12-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20080080538A true KR20080080538A (ko) | 2008-09-04 |
Family
ID=36889282
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020087014190A Ceased KR20080080538A (ko) | 2005-12-14 | 2006-12-01 | 데이터 송신 버스에 액세스하는 방법, 대응하는 디바이스및 시스템 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20100122000A1 (https=) |
| EP (1) | EP1960891A1 (https=) |
| JP (1) | JP2009519524A (https=) |
| KR (1) | KR20080080538A (https=) |
| CN (1) | CN101331469B (https=) |
| FR (1) | FR2894696A1 (https=) |
| WO (1) | WO2007068606A1 (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5775101B2 (ja) * | 2013-01-18 | 2015-09-09 | 日本電信電話株式会社 | 信号受信回路 |
| TWI494944B (zh) * | 2013-10-25 | 2015-08-01 | Phison Electronics Corp | 記憶體模組偵測方法、記憶體控制電路單元及儲存裝置 |
| CN106610906A (zh) * | 2015-10-27 | 2017-05-03 | 深圳市中兴微电子技术有限公司 | 一种数据访问方法及总线 |
| US9965410B2 (en) | 2016-01-21 | 2018-05-08 | Qualcomm Incorporated | Priority-based data communication over multiple communication buses |
| CN115454897B (zh) * | 2022-09-23 | 2026-03-31 | 中电科申泰信息科技有限公司 | 一种改善处理器总线仲裁机制的方法 |
Family Cites Families (37)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SE445861B (sv) * | 1984-12-12 | 1986-07-21 | Ellemtel Utvecklings Ab | Prioritetsfordelningsanordning for datorer |
| CA2021826A1 (en) * | 1989-10-23 | 1991-04-24 | Darryl Edmond Judice | Delay logic for preventing cpu lockout from bus ownership |
| DE69030640T2 (de) * | 1989-11-03 | 1997-11-06 | Compaq Computer Corp | Multiprozessorarbitrierung in für Einzelprozessor bestimmten Arbitrierungsschemas |
| JP2507643B2 (ja) * | 1989-12-28 | 1996-06-12 | 株式会社日立製作所 | 共通バス制御方法及びその制御装置並びにマスタ装置と計算機システム |
| JP3260456B2 (ja) * | 1992-12-25 | 2002-02-25 | 株式会社日立製作所 | コンピュータシステムおよびそれに適した集積回路並びに要求選択回路 |
| JP3195489B2 (ja) * | 1994-03-03 | 2001-08-06 | 株式会社日立製作所 | 外部記憶制御装置およびバス切り替え制御方法 |
| US5572686A (en) * | 1995-06-05 | 1996-11-05 | Apple Computer, Inc. | Bus arbitration scheme with priority switching and timer |
| US5862355A (en) * | 1996-09-12 | 1999-01-19 | Telxon Corporation | Method and apparatus for overriding bus prioritization scheme |
| US5925118A (en) * | 1996-10-11 | 1999-07-20 | International Business Machines Corporation | Methods and architectures for overlapped read and write operations |
| US5884051A (en) * | 1997-06-13 | 1999-03-16 | International Business Machines Corporation | System, methods and computer program products for flexibly controlling bus access based on fixed and dynamic priorities |
| GB2337138B (en) * | 1998-01-30 | 2002-12-18 | * Sgs-Thomson Microelectronics Limited | Arbitration |
| US6073132A (en) * | 1998-03-27 | 2000-06-06 | Lsi Logic Corporation | Priority arbiter with shifting sequential priority scheme |
| US6745243B2 (en) * | 1998-06-30 | 2004-06-01 | Nortel Networks Limited | Method and apparatus for network caching and load balancing |
| US6490642B1 (en) * | 1999-08-12 | 2002-12-03 | Mips Technologies, Inc. | Locked read/write on separate address/data bus using write barrier |
| JP2001195353A (ja) * | 2000-01-06 | 2001-07-19 | Rohm Co Ltd | Dma転送システム |
| US6772254B2 (en) * | 2000-06-21 | 2004-08-03 | International Business Machines Corporation | Multi-master computer system with overlapped read and write operations and scalable address pipelining |
| US6587905B1 (en) | 2000-06-29 | 2003-07-01 | International Business Machines Corporation | Dynamic data bus allocation |
| US6859852B2 (en) * | 2000-09-08 | 2005-02-22 | Texas Instruments Incorporated | Immediate grant bus arbiter for bus system |
| US6745273B1 (en) * | 2001-01-12 | 2004-06-01 | Lsi Logic Corporation | Automatic deadlock prevention via arbitration switching |
| JP2002251370A (ja) * | 2001-02-21 | 2002-09-06 | Noritsu Koki Co Ltd | 要求調停方法、要求調停装置、メモリ装置、および写真処理システム |
| JP2002278922A (ja) * | 2001-03-16 | 2002-09-27 | Ricoh Co Ltd | コンピュータバスシステム |
| JP2002312309A (ja) * | 2001-04-09 | 2002-10-25 | Nec Eng Ltd | 調停回路及び調停方法 |
| JP2002318782A (ja) * | 2001-04-20 | 2002-10-31 | Nec Corp | バスシステム |
| JP3791005B2 (ja) * | 2001-11-20 | 2006-06-28 | 日本電気株式会社 | バスアクセス調停装置及びバスアクセス調停方法 |
| US6931470B2 (en) * | 2002-02-11 | 2005-08-16 | Motorola, Inc. | Dual access serial peripheral interface |
| JP2003256358A (ja) * | 2002-02-28 | 2003-09-12 | Sony Corp | アービタ装置及び方法、並びに、リソース共有システム |
| JP2003348097A (ja) * | 2002-05-29 | 2003-12-05 | Hitachi Ulsi Systems Co Ltd | 無線lan装置 |
| US20030229743A1 (en) * | 2002-06-05 | 2003-12-11 | Brown Andrew C. | Methods and structure for improved fairness bus arbitration |
| US7107365B1 (en) * | 2002-06-25 | 2006-09-12 | Cypress Semiconductor Corp. | Early detection and grant, an arbitration scheme for single transfers on AMBA advanced high-performance bus |
| JP2005071049A (ja) * | 2003-08-22 | 2005-03-17 | Murata Mach Ltd | データ転送制御装置 |
| KR101089324B1 (ko) * | 2004-02-20 | 2011-12-02 | 삼성전자주식회사 | 복수의 마스터들을 포함하는 서브 시스템을 개방형 코어프로토콜을 기반으로 하는 버스에 연결하기 위한 버스시스템 |
| US8478921B2 (en) * | 2004-03-31 | 2013-07-02 | Silicon Laboratories, Inc. | Communication apparatus implementing time domain isolation with restricted bus access |
| US20060026329A1 (en) * | 2004-07-30 | 2006-02-02 | Yu James K | System and method for an arbiter rewind |
| JP2006172256A (ja) * | 2004-12-17 | 2006-06-29 | Renesas Technology Corp | 情報処理装置 |
| GB2426604B (en) * | 2005-05-26 | 2010-07-14 | Advanced Risc Mach Ltd | Interconnect logic for a data processing apparatus |
| US7467245B2 (en) * | 2005-07-22 | 2008-12-16 | Cisco Technology, Inc. | PCI arbiter |
| US7395361B2 (en) * | 2005-08-19 | 2008-07-01 | Qualcomm Incorporated | Apparatus and methods for weighted bus arbitration among a plurality of master devices based on transfer direction and/or consumed bandwidth |
-
2005
- 2005-12-14 FR FR0553872A patent/FR2894696A1/fr active Pending
-
2006
- 2006-12-01 EP EP06819883A patent/EP1960891A1/fr not_active Ceased
- 2006-12-01 US US12/086,457 patent/US20100122000A1/en not_active Abandoned
- 2006-12-01 CN CN2006800474571A patent/CN101331469B/zh not_active Expired - Fee Related
- 2006-12-01 KR KR1020087014190A patent/KR20080080538A/ko not_active Ceased
- 2006-12-01 WO PCT/EP2006/069181 patent/WO2007068606A1/fr not_active Ceased
- 2006-12-01 JP JP2008544948A patent/JP2009519524A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| FR2894696A1 (fr) | 2007-06-15 |
| CN101331469A (zh) | 2008-12-24 |
| JP2009519524A (ja) | 2009-05-14 |
| EP1960891A1 (fr) | 2008-08-27 |
| CN101331469B (zh) | 2011-11-09 |
| US20100122000A1 (en) | 2010-05-13 |
| WO2007068606A1 (fr) | 2007-06-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5237351B2 (ja) | より高い周波数アービターを介してサイクルあたり複数のバスアービトレーションを有するスイッチマトリクスシステム | |
| RU2110838C1 (ru) | Устройство для оптимизации организации доступа к общей шине во время передачи данных с прямым доступом к памяти | |
| US6751698B1 (en) | Multiprocessor node controller circuit and method | |
| US6704821B2 (en) | Arbitration method and circuit architecture therefore | |
| CN105260331B (zh) | 一种双总线内存控制器 | |
| US6823411B2 (en) | N-way psuedo cross-bar having an arbitration feature using discrete processor local busses | |
| KR20080039499A (ko) | 전송 방향 및 소비되는 대역폭에 기초하는 가중된 버스중재 | |
| US6119188A (en) | Priority allocation in a bus interconnected discrete and/or integrated digital multi-module system | |
| US7107365B1 (en) | Early detection and grant, an arbitration scheme for single transfers on AMBA advanced high-performance bus | |
| US6275890B1 (en) | Low latency data path in a cross-bar switch providing dynamically prioritized bus arbitration | |
| JP4198376B2 (ja) | バスシステム及びバスシステムを含む情報処理システム | |
| US9003092B2 (en) | System on chip bus system and a method of operating the bus system | |
| KR100626362B1 (ko) | 고속 대역폭의 시스템 버스를 중재하기 위한 중재기, 중재기를 포함하는 버스 시스템 및 버스 중재 방법 | |
| KR20080080538A (ko) | 데이터 송신 버스에 액세스하는 방법, 대응하는 디바이스및 시스템 | |
| US7185128B1 (en) | System and method for machine specific register addressing in external devices | |
| CN117707426A (zh) | 一种芯粒、io资源共享方法、片上系统及电子设备 | |
| JPH09153009A (ja) | 階層構成バスのアービトレーション方法 | |
| KR101041477B1 (ko) | 버스 시스템의 버스 중재 장치 및 방법 | |
| KR100407022B1 (ko) | 가변 다중경로를 갖는 멀티포인트 네트워크의 버스 동적할당 방법 및 시스템 | |
| KR100857906B1 (ko) | 마스터와 슬레이브 사이의 버스 전송을 제어하는 방법 및중재기 | |
| KR100210404B1 (ko) | 공유 메모리 억세스 제어장치 | |
| JP4496923B2 (ja) | 共有メモリシステム | |
| KR100407176B1 (ko) | 직렬 네트워크의 전송코드 확장에 의한 제어·상태 신호전송 방법 및 시스템 | |
| KR20060118875A (ko) | 버스인터페이스 | |
| JPH11232215A (ja) | バスコントローラ、バスマスタ装置及びバス制御システムの制御方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
Patent event date: 20080612 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PG1501 | Laying open of application | ||
| A201 | Request for examination | ||
| PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 20111118 Comment text: Request for Examination of Application |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20130128 Patent event code: PE09021S01D |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
Patent event date: 20130807 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20130128 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |