KR20080040582A - 반도체 장치 및 반도체 장치의 제조 방법 - Google Patents

반도체 장치 및 반도체 장치의 제조 방법 Download PDF

Info

Publication number
KR20080040582A
KR20080040582A KR1020070110748A KR20070110748A KR20080040582A KR 20080040582 A KR20080040582 A KR 20080040582A KR 1020070110748 A KR1020070110748 A KR 1020070110748A KR 20070110748 A KR20070110748 A KR 20070110748A KR 20080040582 A KR20080040582 A KR 20080040582A
Authority
KR
South Korea
Prior art keywords
mounting portion
chip mounting
lead
chip
thickness direction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020070110748A
Other languages
English (en)
Korean (ko)
Inventor
시게끼 다나까
Original Assignee
가부시끼가이샤 르네사스 테크놀로지
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시끼가이샤 르네사스 테크놀로지 filed Critical 가부시끼가이샤 르네사스 테크놀로지
Publication of KR20080040582A publication Critical patent/KR20080040582A/ko
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P1/00—Details of instruments
    • G01P1/02—Housings
    • G01P1/023—Housings for acceleration measuring devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/0802—Details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/424—Cross-sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Measuring Magnetic Variables (AREA)
KR1020070110748A 2006-11-02 2007-11-01 반도체 장치 및 반도체 장치의 제조 방법 Withdrawn KR20080040582A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006298433A JP2008117875A (ja) 2006-11-02 2006-11-02 半導体装置および半導体装置の製造方法
JPJP-P-2006-00298433 2006-11-02

Publications (1)

Publication Number Publication Date
KR20080040582A true KR20080040582A (ko) 2008-05-08

Family

ID=39359027

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070110748A Withdrawn KR20080040582A (ko) 2006-11-02 2007-11-01 반도체 장치 및 반도체 장치의 제조 방법

Country Status (5)

Country Link
US (1) US8193041B2 (https=)
JP (1) JP2008117875A (https=)
KR (1) KR20080040582A (https=)
CN (2) CN101937856B (https=)
TW (1) TWI446502B (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5334239B2 (ja) * 2008-06-24 2013-11-06 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5380244B2 (ja) * 2009-10-22 2014-01-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN105023905B (zh) * 2015-07-31 2018-01-16 日月光封装测试(上海)有限公司 导线框架和使用该导线框架的功率集成电路封装件
JP7048573B2 (ja) * 2016-08-01 2022-04-07 ▲寧▼波舜宇光▲電▼信息有限公司 カメラモジュールおよびそのモールド回路基板組立体とモールド感光組立体並びに製造方法
JP7043225B2 (ja) * 2017-11-08 2022-03-29 株式会社東芝 半導体装置
US11227810B2 (en) * 2017-11-10 2022-01-18 Shindengen Electric Manufacturing Co., Ltd. Electronic module with a groove and press hole on the surface of a conductor
JP7192688B2 (ja) 2019-07-16 2022-12-20 Tdk株式会社 電子部品パッケージ

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100472833C (zh) * 2002-07-29 2009-03-25 雅马哈株式会社 磁性传感器及传感器器件
EP1387146A3 (en) * 2002-07-29 2006-05-31 Yamaha Corporation Manufacturing method for magnetic sensor and lead frame therefor
JP2006100348A (ja) 2004-09-28 2006-04-13 Yamaha Corp 物理量センサの製造方法
JP2006269859A (ja) * 2005-03-25 2006-10-05 Yamaha Corp 物理量センサ、およびこれに使用するリードフレーム
JP4314580B2 (ja) * 2004-10-01 2009-08-19 ヤマハ株式会社 物理量センサ、およびこれに使用するリードフレーム
US7791180B2 (en) * 2004-10-01 2010-09-07 Yamaha Corporation Physical quantity sensor and lead frame used for same
TWI280399B (en) * 2004-10-01 2007-05-01 Yamaha Corp Physical amount sensor and lead frame used therein
US7595548B2 (en) * 2004-10-08 2009-09-29 Yamaha Corporation Physical quantity sensor and manufacturing method therefor
JP4345685B2 (ja) * 2005-02-22 2009-10-14 ヤマハ株式会社 物理量センサ、これに使用するリードフレーム、及び、リードフレームの製造方法
US20060185452A1 (en) * 2005-02-22 2006-08-24 Yamaha Corporation Lead frame, sensor including lead frame, resin composition to be used for resin mold in the sensor, and sensor including the resin mold
KR100740358B1 (ko) * 2005-02-25 2007-07-16 야마하 가부시키가이샤 센서 및 센서 형성 방법
JP4652281B2 (ja) * 2006-05-29 2011-03-16 パナソニック株式会社 樹脂封止型半導体装置

Also Published As

Publication number Publication date
CN101174603A (zh) 2008-05-07
TW200834858A (en) 2008-08-16
TWI446502B (zh) 2014-07-21
US8193041B2 (en) 2012-06-05
CN101937856B (zh) 2014-04-16
CN101937856A (zh) 2011-01-05
US20080105959A1 (en) 2008-05-08
JP2008117875A (ja) 2008-05-22

Similar Documents

Publication Publication Date Title
US8237250B2 (en) Advanced quad flat non-leaded package structure and manufacturing method thereof
US6294830B1 (en) Microelectronic assembly with conductive terminals having an exposed surface through a dielectric layer
US6638790B2 (en) Leadframe and method for manufacturing resin-molded semiconductor device
US6358778B1 (en) Semiconductor package comprising lead frame with punched parts for terminals
KR20080040582A (ko) 반도체 장치 및 반도체 장치의 제조 방법
KR101602982B1 (ko) 리드 프레임 기판과 그 제조 방법, 및 반도체 장치
KR20110031133A (ko) 수지 밀봉형 반도체 장치 및 그 제조 방법
CN205609512U (zh) 半导体封装体
US8105881B2 (en) Method of fabricating chip package structure
JP2000183229A (ja) チップスケ―ルパッケ―ジ
US20180122731A1 (en) Plated ditch pre-mold lead frame, semiconductor package, and method of making same
KR20110130458A (ko) 반도체 소자 기판, 그 제조 방법 및 반도체 장치
JP2003309242A (ja) リードフレーム部材とリードフレーム部材の製造方法、及び該リードフレーム部材を用いた半導体パッケージとその製造方法
KR20110081813A (ko) 리드 프레임 기판과 그 제조 방법 및 반도체 장치
CN106847782A (zh) 半导体装置及其制造方法、引线框架及其制造方法
JP5767294B2 (ja) 半導体装置
JP4373122B2 (ja) 樹脂封止型半導体装置とその製造方法
US20040262752A1 (en) Semiconductor device
JP2010165777A (ja) 半導体装置及びその製造方法
TWI462192B (zh) 半導體封裝件及其製法
CN112310028B (zh) 用于半导体器件的封装的引线框架、半导体器件以及用于制造半导体器件的工艺
KR20080025001A (ko) 반도체 장치의 제조 방법 및 반도체 장치
JP2005311099A (ja) 半導体装置及びその製造方法
JP2005191158A (ja) 半導体装置及びその製造方法
US20210098358A1 (en) Semiconductor package

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

N231 Notification of change of applicant
PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000