KR20060101499A - 화합물 반도체 기판의 제조 방법 - Google Patents

화합물 반도체 기판의 제조 방법 Download PDF

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Publication number
KR20060101499A
KR20060101499A KR1020067010033A KR20067010033A KR20060101499A KR 20060101499 A KR20060101499 A KR 20060101499A KR 1020067010033 A KR1020067010033 A KR 1020067010033A KR 20067010033 A KR20067010033 A KR 20067010033A KR 20060101499 A KR20060101499 A KR 20060101499A
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KR
South Korea
Prior art keywords
substrate
compound semiconductor
functional layer
semiconductor functional
layer
Prior art date
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Ceased
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KR1020067010033A
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English (en)
Korean (ko)
Inventor
마사히코 하타
요시노부 오노
가즈마사 우에다
Original Assignee
스미또모 가가꾸 가부시키가이샤
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Publication of KR20060101499A publication Critical patent/KR20060101499A/ko
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Bipolar Transistors (AREA)
KR1020067010033A 2003-10-27 2004-10-25 화합물 반도체 기판의 제조 방법 Ceased KR20060101499A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003365736A JP2005129825A (ja) 2003-10-27 2003-10-27 化合物半導体基板の製造方法
JPJP-P-2003-00365736 2003-10-27

Publications (1)

Publication Number Publication Date
KR20060101499A true KR20060101499A (ko) 2006-09-25

Family

ID=34510191

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020067010033A Ceased KR20060101499A (ko) 2003-10-27 2004-10-25 화합물 반도체 기판의 제조 방법

Country Status (8)

Country Link
US (1) US20070082467A1 (enExample)
JP (1) JP2005129825A (enExample)
KR (1) KR20060101499A (enExample)
CN (1) CN1871699B (enExample)
DE (1) DE112004002033T5 (enExample)
GB (1) GB2422489B8 (enExample)
TW (1) TW200520212A (enExample)
WO (1) WO2005041287A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180086152A (ko) 2017-01-20 2018-07-30 한양대학교 산학협력단 3차원 뉴로모픽 소자 및 그 제조방법

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060284167A1 (en) * 2005-06-17 2006-12-21 Godfrey Augustine Multilayered substrate obtained via wafer bonding for power applications
US7799599B1 (en) * 2007-05-31 2010-09-21 Chien-Min Sung Single crystal silicon carbide layers on diamond and associated methods
JP2009143756A (ja) * 2007-12-13 2009-07-02 Shin Etsu Chem Co Ltd ＧａＮ層含有積層基板及びその製造方法並びにデバイス
JP5441094B2 (ja) * 2008-10-01 2014-03-12 国立大学法人京都工芸繊維大学 半導体基板の製造方法および半導体基板
JP5906001B2 (ja) * 2009-03-10 2016-04-20 昭和電工株式会社 発光ダイオード用エピタキシャルウェーハ
US8268707B2 (en) * 2009-06-22 2012-09-18 Raytheon Company Gallium nitride for liquid crystal electrodes
JP5684501B2 (ja) 2010-07-06 2015-03-11 昭和電工株式会社 発光ダイオード用エピタキシャルウェーハ
JP5667109B2 (ja) * 2012-03-13 2015-02-12 日本電信電話株式会社 ヘテロ接合バイポーラトランジスタおよびその製造方法
JP6004343B2 (ja) * 2013-09-13 2016-10-05 日本電信電話株式会社 半導体装置の製造方法
JP2016031953A (ja) 2014-07-25 2016-03-07 株式会社タムラ製作所 半導体素子及びその製造方法、半導体基板、並びに結晶積層構造体
JP2016197737A (ja) * 2016-06-29 2016-11-24 株式会社タムラ製作所 半導体素子及びその製造方法、並びに結晶積層構造体
WO2019013212A1 (ja) * 2017-07-14 2019-01-17 信越化学工業株式会社 高熱伝導性のデバイス基板およびその製造方法
JP6810017B2 (ja) * 2017-11-22 2021-01-06 日本電信電話株式会社 半導体ウエハの製造方法、ヘテロ接合バイポーラトランジスタの製造方法
JP7516786B2 (ja) * 2019-06-21 2024-07-17 株式会社村田製作所 半導体装置及びその製造方法
KR102718211B1 (ko) 2020-04-13 2024-10-15 미쓰비시덴키 가부시키가이샤 반도체 소자의 제조 방법
GB202018616D0 (en) * 2020-11-26 2021-01-13 Element Six Tech Ltd A diamond assembly

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4040849A (en) * 1976-01-06 1977-08-09 General Electric Company Polycrystalline silicon articles by sintering
JP2624119B2 (ja) * 1993-06-03 1997-06-25 日本電気株式会社 複合型半導体積層構造の製造方法
DE69429848T2 (de) * 1993-11-01 2002-09-26 Matsushita Electric Industrial Co., Ltd. Elektronische Anordnung und Verfahren zur Herstellung
GB9401770D0 (en) * 1994-01-31 1994-03-23 Philips Electronics Uk Ltd Manufacture of electronic devices comprising thin-film circuits
JP2669368B2 (ja) * 1994-03-16 1997-10-27 日本電気株式会社 Ｓｉ基板上化合物半導体積層構造の製造方法
JPH11103125A (ja) * 1997-09-29 1999-04-13 Furukawa Electric Co Ltd:The 面発光型半導体レーザ装置の作製方法
US6287941B1 (en) * 1999-04-21 2001-09-11 Silicon Genesis Corporation Surface finishing of SOI substrates using an EPI process
US6984571B1 (en) * 1999-10-01 2006-01-10 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6562648B1 (en) * 2000-08-23 2003-05-13 Xerox Corporation Structure and method for separation and transfer of semiconductor thin films onto dissimilar substrate materials
ATE445233T1 (de) * 2002-01-28 2009-10-15 Nichia Corp Nitrid-halbleiterbauelement mit einem trägersubstrat und verfahren zu seiner herstellung
US6830813B2 (en) * 2003-03-27 2004-12-14 Intel Corporation Stress-reducing structure for electronic devices
US7407863B2 (en) * 2003-10-07 2008-08-05 Board Of Trustees Of The University Of Illinois Adhesive bonding with low temperature grown amorphous or polycrystalline compound semiconductors
US7547925B2 (en) * 2005-11-14 2009-06-16 Palo Alto Research Center Incorporated Superlattice strain relief layer for semiconductor devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180086152A (ko) 2017-01-20 2018-07-30 한양대학교 산학협력단 3차원 뉴로모픽 소자 및 그 제조방법

Also Published As

Publication number Publication date
TW200520212A (en) 2005-06-16
GB0609682D0 (en) 2006-06-28
GB2422489B (en) 2007-03-14
DE112004002033T5 (de) 2006-09-21
WO2005041287A1 (ja) 2005-05-06
GB2422489B8 (en) 2007-03-30
GB2422489A (en) 2006-07-26
CN1871699B (zh) 2012-06-27
US20070082467A1 (en) 2007-04-12
CN1871699A (zh) 2006-11-29
JP2005129825A (ja) 2005-05-19

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