KR20050050679A - 써모플라스트로 만들어진 캐비티 필러들을 구비한 전자소자 및 그 제조 방법 - Google Patents
써모플라스트로 만들어진 캐비티 필러들을 구비한 전자소자 및 그 제조 방법 Download PDFInfo
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Abstract
Description
Claims (9)
- 전자 소자를 제조하는 방법에 있어서,- 최상면(4)상에 콘택 패드(5)들을 가지는 리와이어링 기판(6)을 제공하는 단계,- 플립-칩 기술로 그 능동 최상면(4)상에 플립-칩 콘택(3)들을 갖는 반도체 칩(2)을 제공하는 단계,- 상기 리와이어링 기판(6)의 상기 콘택 패드(5)들에 상기 플립-칩 콘택(3)들을 도포하고 전기적으로 연결시키는 단계,- 써모플라스틱(8)을 포함하여 이루어지는 언더필러(9)로 상기 반도체 칩(2)의 능동 최상면(4)과 상기 리와이어링 기판(6)의 최상면(13)간의 사이공간(7)을 실질적으로 채우는 단계를 가지는 것을 특징으로 하는 방법.
- 제1항에 있어서,상기 언더필러(9)가 도입되기 이전에, 상기 플립-칩 콘택(3)들이 상기 콘택 패드(5)들상에 솔더링되는 것을 특징으로 하는 방법.
- 제1항 또는 제2항에 있어서,상기 반도체 칩(2)을 팩키징하기 위해서, 상기 언더필러(9)의 도입과 거의 동시에, 동일한 써모플라스틱 물질로 만들어진 플라스틱 팩키지(11)가 도포되는 것을 특징으로 하는 방법.
- 제1항 내지 제3항 중 어느 한 항에 있어서,상기 리와이어링 기판(6)에 도포되기에 앞서, 상기 써모플라스틱(8)은 외부 콘택(10)들용 솔더 물질의 용융 온도 아래의 온도로, 바람직하게는 200℃ 내지 220℃ 사이의 온도로 가열되며, 또한 액체 상태로 변화되는 것을 특징으로 하는 방법.
- 제1항 내지 제4항 중 어느 한 항에 있어서,상기 써모플라스틱(8)은, 분산 기술 또는 사출-성형 기술을 이용하여 언더필러(9)로서 도포되는 것을 특징으로 하는 방법.
- 능동 최상면(4)상에 플립-칩 콘택(3)들을 가지는 반도체 칩(2)을 구비한 전자 소자에 있어서,상기 플립-칩 콘택(3)들은 리와이어링 기판(6)상의 콘택 패드(5)들상에 고정되고, 상기 플립-칩 콘택(3)들의 결과로 생기는 상기 반도체 칩(2)과 상기 리와이어링 기판(6) 사이의 사이공간(7)은, 언더필러(9)로서, 그 글래스 전이 온도가 상기 전자 소자(1)의 외부 콘택(10)들의 솔더 물질의 용융 온도보다 낮은 써모플라스틱(8)을 가지는 것을 특징으로 하는 전자 소자.
- 제6항에 있어서,상기 써모플라스틱(8)은 폴리아미드, 폴리아세탈, 폴리카보네이트, 폴리에틸렌, 폴리프로필렌, 폴리에틸렌 테레프탈레이트 또는 그 혼합물을 포함하여 이루어지는 그룹으로부터의 1이상의 물질을 포함하여 이루어지는 것을 특징으로 하는 전자 소자.
- 제6항 또는 제7항에 있어서,상기 전자 소자(1)용 플라스틱 팩키지(11)는 상기 언더필러(9)와 동일한 글래스 전이 온도를 갖는 써모플라스틱(8)을 포함하여 이루어지는 것을 특징으로 하는 전자 소자.
- 제1항 내지 제8항 중 어느 한 항에 있어서,상기 써모플라스틱(8)은 200℃ 내지 220℃ 사이의 온도 범위에서 액체 상태로 존재하는 것을 특징으로 하는 전자 소자.
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DE10250541.1 | 2002-10-29 | ||
DE10250541A DE10250541B9 (de) | 2002-10-29 | 2002-10-29 | Elektronisches Bauteil mit Unterfüllstoffen aus Thermoplasten und Verfahren zu dessen Herstellung |
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US (1) | US20060088954A1 (ko) |
EP (1) | EP1556890A1 (ko) |
JP (1) | JP4545591B2 (ko) |
KR (1) | KR100789349B1 (ko) |
CN (1) | CN100449719C (ko) |
DE (1) | DE10250541B9 (ko) |
WO (1) | WO2004040640A1 (ko) |
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DE102004031889B4 (de) * | 2004-06-30 | 2012-07-12 | Infineon Technologies Ag | Halbleiterbauteil mit einem Gehäuse und einem teilweise in eine Kunststoffgehäusemasse eingebetteten Halbleiterchip und Verfahren zur Herstellung desselben |
WO2006043122A1 (en) * | 2004-10-21 | 2006-04-27 | Infineon Technologies Ag | Semiconductor package and method to produce the same |
WO2007017341A1 (de) * | 2005-08-11 | 2007-02-15 | Siemens Aktiengesellschaft | Fluxing encapsulants - giessharze für dca-anwendungen auf basis kationisch härtbarer epoxidharze |
DE102005047856B4 (de) * | 2005-10-05 | 2007-09-06 | Infineon Technologies Ag | Halbleiterbauteil mit in Kunststoffgehäusemasse eingebetteten Halbleiterbauteilkomponenten, Systemträger zur Aufnahme der Halbleiterbauteilkomponenten und Verfahren zur Herstellung des Systemträgers und von Halbleiterbauteilen |
KR101726262B1 (ko) * | 2015-01-02 | 2017-04-13 | 삼성전자주식회사 | 패키지 기판용 필름, 이를 사용한 반도체 패키지 및 반도체 패키지를 포함하는 표시 장치 |
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US5371404A (en) * | 1993-02-04 | 1994-12-06 | Motorola, Inc. | Thermally conductive integrated circuit package with radio frequency shielding |
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-
2002
- 2002-10-29 DE DE10250541A patent/DE10250541B9/de not_active Expired - Fee Related
-
2003
- 2003-10-20 WO PCT/DE2003/003463 patent/WO2004040640A1/de active Search and Examination
- 2003-10-20 EP EP03776797A patent/EP1556890A1/de not_active Withdrawn
- 2003-10-20 KR KR1020057007606A patent/KR100789349B1/ko not_active IP Right Cessation
- 2003-10-20 CN CNB2003801025133A patent/CN100449719C/zh not_active Expired - Fee Related
- 2003-10-20 US US10/515,517 patent/US20060088954A1/en not_active Abandoned
- 2003-10-20 JP JP2004547404A patent/JP4545591B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP4545591B2 (ja) | 2010-09-15 |
CN100449719C (zh) | 2009-01-07 |
CN1751386A (zh) | 2006-03-22 |
EP1556890A1 (de) | 2005-07-27 |
DE10250541B9 (de) | 2004-09-16 |
KR100789349B1 (ko) | 2007-12-28 |
WO2004040640A1 (de) | 2004-05-13 |
US20060088954A1 (en) | 2006-04-27 |
DE10250541B3 (de) | 2004-04-15 |
JP2006504275A (ja) | 2006-02-02 |
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