KR20030038329A - 반도체 장치 - Google Patents
반도체 장치 Download PDFInfo
- Publication number
- KR20030038329A KR20030038329A KR1020020038150A KR20020038150A KR20030038329A KR 20030038329 A KR20030038329 A KR 20030038329A KR 1020020038150 A KR1020020038150 A KR 1020020038150A KR 20020038150 A KR20020038150 A KR 20020038150A KR 20030038329 A KR20030038329 A KR 20030038329A
- Authority
- KR
- South Korea
- Prior art keywords
- circuit
- output
- power supply
- voltage
- potential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Dram (AREA)
- Logic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Power Conversion In General (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001336161A JP3927788B2 (ja) | 2001-11-01 | 2001-11-01 | 半導体装置 |
| JPJP-P-2001-00336161 | 2001-11-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20030038329A true KR20030038329A (ko) | 2003-05-16 |
Family
ID=19151029
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020020038150A Ceased KR20030038329A (ko) | 2001-11-01 | 2002-07-03 | 반도체 장치 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6621329B2 (enExample) |
| JP (1) | JP3927788B2 (enExample) |
| KR (1) | KR20030038329A (enExample) |
| DE (1) | DE10223763B4 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20130073842A (ko) * | 2011-12-23 | 2013-07-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 기준 전위 생성 회로 |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102007030569B4 (de) * | 2007-07-02 | 2012-11-08 | Austriamicrosystems Ag | Schaltungsanordnung und Verfahren zum Auswerten eines Datensignals |
| DE102008053536B4 (de) * | 2008-10-28 | 2011-12-01 | Atmel Automotive Gmbh | Schaltung, Verwendung und Verfahren zum Betrieb einer Schaltung |
| JP2011035271A (ja) * | 2009-08-04 | 2011-02-17 | Renesas Electronics Corp | 電圧変動削減回路および半導体装置 |
| US8531898B2 (en) | 2010-04-02 | 2013-09-10 | Samsung Electronics Co., Ltd. | On-die termination circuit, data output buffer and semiconductor memory device |
| KR101939234B1 (ko) | 2012-07-23 | 2019-01-16 | 삼성전자 주식회사 | 메모리 장치, 메모리 시스템 및 상기 메모리 장치의 독출 전압의 제어 방법 |
| US9374004B2 (en) * | 2013-06-28 | 2016-06-21 | Intel Corporation | I/O driver transmit swing control |
| US9749701B2 (en) * | 2014-04-17 | 2017-08-29 | Microsoft Technology Licensing, Llc | Intelligent routing of notifications to grouped devices |
| JP6466761B2 (ja) | 2015-03-31 | 2019-02-06 | ラピスセミコンダクタ株式会社 | 半導体装置、及び電源供給方法 |
| KR20170016582A (ko) * | 2015-08-04 | 2017-02-14 | 에스케이하이닉스 주식회사 | 복수의 전원을 사용하는 메모리 장치 및 이를 포함하는 시스템 |
| US11978701B2 (en) * | 2016-08-09 | 2024-05-07 | Skyworks Solutions, Inc. | Programmable fuse with single fuse pad and control methods thereof |
| US11411561B2 (en) | 2018-10-24 | 2022-08-09 | Sony Semiconductor Solutions Corporation | Semiconductor circuit and semiconductor system |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05314769A (ja) * | 1992-05-13 | 1993-11-26 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| US5396113A (en) * | 1991-08-19 | 1995-03-07 | Samsung Electronics Co., Ltd. | Electrically programmable internal power voltage generating circuit |
| US5457421A (en) * | 1993-02-10 | 1995-10-10 | Nec Corporation | Voltage stepdown circuit including a voltage divider |
| JPH09289288A (ja) * | 1996-04-19 | 1997-11-04 | Toshiba Corp | 半導体装置 |
| KR20000059994A (ko) * | 1999-03-10 | 2000-10-16 | 김영환 | 출력 구동회로 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59160219A (ja) | 1983-03-02 | 1984-09-10 | Sharp Corp | 定電圧電源回路 |
| JPH0385562A (ja) | 1989-08-30 | 1991-04-10 | Fujitsu Ltd | 像記録装置の制御方法 |
| KR940003406B1 (ko) * | 1991-06-12 | 1994-04-21 | 삼성전자 주식회사 | 내부 전원전압 발생회로 |
| JPH05102831A (ja) * | 1991-10-09 | 1993-04-23 | Mitsubishi Electric Corp | 半導体集積回路の出力回路 |
| JP3085562B2 (ja) | 1992-10-12 | 2000-09-11 | 三菱電機株式会社 | 基準電圧発生回路および内部降圧回路 |
| DE4334918C2 (de) * | 1992-10-15 | 2000-02-03 | Mitsubishi Electric Corp | Absenkkonverter zum Absenken einer externen Versorgungsspannung mit Kompensation herstellungsbedingter Abweichungen, seine Verwendung sowie zugehöriges Betriebsverfahren |
| JPH07105682A (ja) * | 1993-10-06 | 1995-04-21 | Nec Corp | ダイナミックメモリ装置 |
| US5594373A (en) * | 1994-12-20 | 1997-01-14 | Sgs-Thomson Microelectronics, Inc. | Output driver circuitry with selective limited output high voltage |
| JPH08251010A (ja) * | 1995-03-10 | 1996-09-27 | Mitsubishi Electric Corp | 半導体装置 |
| US5933026A (en) * | 1997-04-11 | 1999-08-03 | Intel Corporation | Self-configuring interface architecture on flash memories |
| JP3202196B2 (ja) | 1998-08-25 | 2001-08-27 | 沖電気工業株式会社 | 出力回路と入力回路 |
-
2001
- 2001-11-01 JP JP2001336161A patent/JP3927788B2/ja not_active Expired - Fee Related
-
2002
- 2002-04-30 US US10/134,428 patent/US6621329B2/en not_active Expired - Lifetime
- 2002-05-28 DE DE10223763A patent/DE10223763B4/de not_active Expired - Fee Related
- 2002-07-03 KR KR1020020038150A patent/KR20030038329A/ko not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5396113A (en) * | 1991-08-19 | 1995-03-07 | Samsung Electronics Co., Ltd. | Electrically programmable internal power voltage generating circuit |
| JPH05314769A (ja) * | 1992-05-13 | 1993-11-26 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| US5457421A (en) * | 1993-02-10 | 1995-10-10 | Nec Corporation | Voltage stepdown circuit including a voltage divider |
| JPH09289288A (ja) * | 1996-04-19 | 1997-11-04 | Toshiba Corp | 半導体装置 |
| KR20000059994A (ko) * | 1999-03-10 | 2000-10-16 | 김영환 | 출력 구동회로 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20130073842A (ko) * | 2011-12-23 | 2013-07-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 기준 전위 생성 회로 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2003143000A (ja) | 2003-05-16 |
| US20030080717A1 (en) | 2003-05-01 |
| DE10223763B4 (de) | 2009-07-23 |
| DE10223763A1 (de) | 2003-05-28 |
| US6621329B2 (en) | 2003-09-16 |
| JP3927788B2 (ja) | 2007-06-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100744861B1 (ko) | 전압 레벨 시프터 회로 및 전압 레벨 시프트 방법 | |
| US8218377B2 (en) | Fail-safe high speed level shifter for wide supply voltage range | |
| US7397297B2 (en) | Level shifter circuit | |
| US7088127B2 (en) | Adaptive impedance output driver circuit | |
| KR20030038329A (ko) | 반도체 장치 | |
| US7750723B2 (en) | Voltage generation circuit provided in a semiconductor integrated device | |
| US7868667B2 (en) | Output driving device | |
| US10218351B2 (en) | Parallel driving circuit of voltage-driven type semiconductor element | |
| US7372765B2 (en) | Power-gating system and method for integrated circuit devices | |
| US7605636B2 (en) | Power gating structure, semiconductor including the same and method of controlling a power gating | |
| US7659748B2 (en) | Electronic device and integrated circuit | |
| US7750689B1 (en) | High voltage switch with reduced voltage stress at output stage | |
| KR100243824B1 (ko) | 디스플레이 드라이버 | |
| CN110176924B (zh) | 半导体器件 | |
| US7449940B2 (en) | Buffer circuit | |
| KR100971990B1 (ko) | 논리회로 및 반도체장치 | |
| US7589562B2 (en) | I/O cell capable of finely controlling drive strength | |
| JP2024004786A (ja) | ゲート駆動装置 | |
| US7652530B2 (en) | Amplifier circuit and method of generating bias voltage in amplifier circuit | |
| US20080143430A1 (en) | Output signal driving circuit and method of driving output signal | |
| JP2004112156A (ja) | レベルトランスレータ回路 | |
| US20040041597A1 (en) | Input and output port circuit | |
| US7098698B2 (en) | Semiconductor integrated circuit device and sense amplifier of memory | |
| JP3406049B2 (ja) | 半導体装置 | |
| KR100402241B1 (ko) | 전류 제어 방식의 저잡음 출력 드라이버 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 20020703 |
|
| PA0201 | Request for examination | ||
| PG1501 | Laying open of application | ||
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20040420 Patent event code: PE09021S01D |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
Patent event date: 20041206 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20040420 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |