KR20010112849A - 반도체 집적 회로 장치 및 반도체 집적 회로 장치의 제조방법 - Google Patents

반도체 집적 회로 장치 및 반도체 집적 회로 장치의 제조방법 Download PDF

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Publication number
KR20010112849A
KR20010112849A KR1020010033503A KR20010033503A KR20010112849A KR 20010112849 A KR20010112849 A KR 20010112849A KR 1020010033503 A KR1020010033503 A KR 1020010033503A KR 20010033503 A KR20010033503 A KR 20010033503A KR 20010112849 A KR20010112849 A KR 20010112849A
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KR
South Korea
Prior art keywords
field effect
effect transistor
channel
integrated circuit
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020010033503A
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English (en)
Korean (ko)
Inventor
이또후미또시
Original Assignee
가나이 쓰토무
가부시키가이샤 히타치세이사쿠쇼
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Publication of KR20010112849A publication Critical patent/KR20010112849A/ko
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS

Landscapes

  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020010033503A 2000-06-15 2001-06-14 반도체 집적 회로 장치 및 반도체 집적 회로 장치의 제조방법 Ceased KR20010112849A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000-180004 2000-06-15
JP2000180004A JP2001358233A (ja) 2000-06-15 2000-06-15 半導体集積回路装置および半導体集積回路装置の製造方法

Publications (1)

Publication Number Publication Date
KR20010112849A true KR20010112849A (ko) 2001-12-22

Family

ID=18681177

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020010033503A Ceased KR20010112849A (ko) 2000-06-15 2001-06-14 반도체 집적 회로 장치 및 반도체 집적 회로 장치의 제조방법

Country Status (4)

Country Link
US (3) US20020001899A1 (enExample)
JP (1) JP2001358233A (enExample)
KR (1) KR20010112849A (enExample)
TW (1) TW520566B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100773009B1 (ko) * 2003-07-21 2007-11-05 인터내셔널 비지네스 머신즈 코포레이션 다수 개의 표면을 따라 변형 격자 구조를 가지는 전계 효과트랜지스터 채널

Families Citing this family (18)

* Cited by examiner, † Cited by third party
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JP2001358233A (ja) * 2000-06-15 2001-12-26 Hitachi Ltd 半導体集積回路装置および半導体集積回路装置の製造方法
JP4799786B2 (ja) * 2001-10-02 2011-10-26 ルネサスエレクトロニクス株式会社 電力増幅用電界効果型半導体装置およびその製造方法、ならびにパワーモジュール
KR100456688B1 (ko) * 2002-01-07 2004-11-10 삼성전자주식회사 완전 씨모스 에스램 셀
JP3997089B2 (ja) * 2002-01-10 2007-10-24 株式会社ルネサステクノロジ 半導体装置
JP2004055803A (ja) * 2002-07-19 2004-02-19 Renesas Technology Corp 半導体装置
JP2004273972A (ja) * 2003-03-12 2004-09-30 Renesas Technology Corp 半導体装置
TW200423274A (en) * 2003-04-25 2004-11-01 United Microelectronics Corp Method of measuring a gate channel length of a metal-oxide semiconductor transistor
KR100568859B1 (ko) * 2003-08-21 2006-04-10 삼성전자주식회사 디램 반도체 장치의 트랜지스터 제조방법
JP4532951B2 (ja) * 2004-03-24 2010-08-25 川崎マイクロエレクトロニクス株式会社 半導体集積回路の使用方法および半導体集積回路
US7528447B2 (en) * 2005-04-06 2009-05-05 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory and method for controlling a non-volatile semiconductor memory
JP2007123632A (ja) * 2005-10-28 2007-05-17 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2008153567A (ja) * 2006-12-20 2008-07-03 Elpida Memory Inc 半導体メモリ及びその製造方法
JP2008244093A (ja) * 2007-03-27 2008-10-09 Elpida Memory Inc 半導体装置の製造方法
JP4896789B2 (ja) * 2007-03-29 2012-03-14 株式会社東芝 半導体装置の製造方法
EP1986230A2 (en) * 2007-04-25 2008-10-29 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing SOI substrate and method of manufacturing semiconductor device
JP2011176348A (ja) * 2011-04-25 2011-09-08 Renesas Electronics Corp 半導体装置
US9029243B2 (en) 2012-10-08 2015-05-12 Infineon Technologies Ag Method for producing a semiconductor device and field-effect semiconductor device
US10199267B2 (en) * 2017-06-30 2019-02-05 Lam Research Corporation Tungsten nitride barrier layer deposition

Citations (3)

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Publication number Priority date Publication date Assignee Title
KR940022919A (ko) * 1993-03-17 1994-10-22 문정환 모스펫(mosfet)구조 및 제조방법
JPH0992830A (ja) * 1995-09-25 1997-04-04 Lg Semicon Co Ltd トランジスタの製造方法
KR970018708A (ko) * 1995-09-29 1997-04-30 김광호 반도체 장치 및 그 제조 방법

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US544012A (en) * 1895-08-06 spangler
KR940002772B1 (ko) * 1984-08-31 1994-04-02 가부시기가이샤 히다찌세이사꾸쇼 반도체 집적회로 장치 및 그 제조방법
JPH06101547B2 (ja) * 1985-05-13 1994-12-12 株式会社日立製作所 半導体集積回路装置及びその製造方法
US5194749A (en) * 1987-11-30 1993-03-16 Hitachi, Ltd. Semiconductor integrated circuit device
KR100199258B1 (ko) * 1990-02-09 1999-06-15 가나이 쓰도무 반도체집적회로장치
US5572480A (en) * 1990-02-09 1996-11-05 Hitachi Ltd. Semiconductor integrated circuit device and process for fabricating the same
JPH04361568A (ja) * 1991-06-10 1992-12-15 Hitachi Ltd 半導体記憶装置及びその製造方法
TW297158B (enExample) * 1994-05-27 1997-02-01 Hitachi Ltd
JP3535615B2 (ja) * 1995-07-18 2004-06-07 株式会社ルネサステクノロジ 半導体集積回路装置
US6262456B1 (en) * 1998-11-06 2001-07-17 Advanced Micro Devices, Inc. Integrated circuit having transistors with different threshold voltages
JP2000243854A (ja) * 1999-02-22 2000-09-08 Toshiba Corp 半導体装置及びその製造方法
US6281559B1 (en) * 1999-03-03 2001-08-28 Advanced Micro Devices, Inc. Gate stack structure for variable threshold voltage
FR2795868B1 (fr) * 1999-07-02 2003-05-16 St Microelectronics Sa Transistor mosfet a effet canal court compense par le materiau de grille
US6214681B1 (en) * 2000-01-26 2001-04-10 Advanced Micro Devices, Inc. Process for forming polysilicon/germanium thin films without germanium outgassing
TW497120B (en) * 2000-03-06 2002-08-01 Toshiba Corp Transistor, semiconductor device and manufacturing method of semiconductor device
DE10014916C2 (de) * 2000-03-17 2002-01-24 Infineon Technologies Ag Verfahren zur Einstellung der Schwellenspannung eines MOS-Transistors
JP4056195B2 (ja) * 2000-03-30 2008-03-05 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP2001358233A (ja) * 2000-06-15 2001-12-26 Hitachi Ltd 半導体集積回路装置および半導体集積回路装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940022919A (ko) * 1993-03-17 1994-10-22 문정환 모스펫(mosfet)구조 및 제조방법
JPH0992830A (ja) * 1995-09-25 1997-04-04 Lg Semicon Co Ltd トランジスタの製造方法
KR970018708A (ko) * 1995-09-29 1997-04-30 김광호 반도체 장치 및 그 제조 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100773009B1 (ko) * 2003-07-21 2007-11-05 인터내셔널 비지네스 머신즈 코포레이션 다수 개의 표면을 따라 변형 격자 구조를 가지는 전계 효과트랜지스터 채널

Also Published As

Publication number Publication date
JP2001358233A (ja) 2001-12-26
US20040150120A1 (en) 2004-08-05
US20020001899A1 (en) 2002-01-03
US20030127663A1 (en) 2003-07-10
TW520566B (en) 2003-02-11

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