KR20000023044A - 반도체집적회로장치의 제조방법 - Google Patents

반도체집적회로장치의 제조방법 Download PDF

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Publication number
KR20000023044A
KR20000023044A KR1019990038505A KR19990038505A KR20000023044A KR 20000023044 A KR20000023044 A KR 20000023044A KR 1019990038505 A KR1019990038505 A KR 1019990038505A KR 19990038505 A KR19990038505 A KR 19990038505A KR 20000023044 A KR20000023044 A KR 20000023044A
Authority
KR
South Korea
Prior art keywords
forming
insulating layer
misfet
hole
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019990038505A
Other languages
English (en)
Korean (ko)
Inventor
하시모토타카시
쿠로다켄이치
슈쿠리쇼우지
Original Assignee
가나이 쓰토무
가부시키가이샤 히타치세이사쿠쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 쓰토무, 가부시키가이샤 히타치세이사쿠쇼 filed Critical 가나이 쓰토무
Publication of KR20000023044A publication Critical patent/KR20000023044A/ko
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H10D84/0133—Manufacturing common source or drain regions between multiple IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1019990038505A 1998-09-11 1999-09-10 반도체집적회로장치의 제조방법 Ceased KR20000023044A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP25893698A JP3869128B2 (ja) 1998-09-11 1998-09-11 半導体集積回路装置の製造方法
JP98-258936 1998-09-11

Publications (1)

Publication Number Publication Date
KR20000023044A true KR20000023044A (ko) 2000-04-25

Family

ID=17327108

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1019990038505A Ceased KR20000023044A (ko) 1998-09-11 1999-09-10 반도체집적회로장치의 제조방법
KR1019990038531A Expired - Fee Related KR100702869B1 (ko) 1998-09-11 1999-09-10 반도체집적회로장치의 제조방법

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1019990038531A Expired - Fee Related KR100702869B1 (ko) 1998-09-11 1999-09-10 반도체집적회로장치의 제조방법

Country Status (4)

Country Link
US (1) US6069038A (enExample)
JP (1) JP3869128B2 (enExample)
KR (2) KR20000023044A (enExample)
TW (1) TW419813B (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6838320B2 (en) * 2000-08-02 2005-01-04 Renesas Technology Corp. Method for manufacturing a semiconductor integrated circuit device
US6218288B1 (en) 1998-05-11 2001-04-17 Micron Technology, Inc. Multiple step methods for forming conformal layers
JP3911585B2 (ja) * 1999-05-18 2007-05-09 富士通株式会社 半導体装置およびその製造方法
KR100359246B1 (ko) * 1999-09-29 2002-11-04 동부전자 주식회사 적층형 캐패시터를 갖는 반도체 장치 제조 방법
JP2001176964A (ja) * 1999-12-16 2001-06-29 Mitsubishi Electric Corp 半導体装置および半導体装置製造方法
US6251726B1 (en) * 2000-01-21 2001-06-26 Taiwan Semiconductor Manufacturing Company Method for making an enlarged DRAM capacitor using an additional polysilicon plug as a center pillar
JP4057770B2 (ja) 2000-10-11 2008-03-05 株式会社ルネサステクノロジ 半導体集積回路装置
US6403423B1 (en) 2000-11-15 2002-06-11 International Business Machines Corporation Modified gate processing for optimized definition of array and logic devices on same chip
KR100574715B1 (ko) * 2001-01-30 2006-04-28 가부시키가이샤 히타치세이사쿠쇼 반도체 집적 회로 장치
US6486033B1 (en) * 2001-03-16 2002-11-26 Taiwan Semiconductor Manufacturing Company SAC method for embedded DRAM devices
JP3863391B2 (ja) * 2001-06-13 2006-12-27 Ｎｅｃエレクトロニクス株式会社 半導体装置
KR100404480B1 (ko) * 2001-06-29 2003-11-05 주식회사 하이닉스반도체 반도체 소자의 제조방법
JP4911838B2 (ja) * 2001-07-06 2012-04-04 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US6518151B1 (en) * 2001-08-07 2003-02-11 International Business Machines Corporation Dual layer hard mask for eDRAM gate etch process
US6730553B2 (en) * 2001-08-30 2004-05-04 Micron Technology, Inc. Methods for making semiconductor structures having high-speed areas and high-density areas
US6501120B1 (en) * 2002-01-15 2002-12-31 Taiwan Semiconductor Manufacturing Company, Ltd Capacitor under bitline (CUB) memory cell structure employing air gap void isolation
JP2004111414A (ja) * 2002-09-13 2004-04-08 Renesas Technology Corp 半導体装置の製造方法
DE10314595B4 (de) * 2003-03-31 2006-05-04 Infineon Technologies Ag Verfahren zur Herstellung von Transistoren unterschiedlichen Leitungstyps und unterschiedlicher Packungsdichte in einem Halbleitersubstrat
TWI223392B (en) * 2003-04-07 2004-11-01 Nanya Technology Corp Method of filling bit line contact via
US8118869B2 (en) * 2006-03-08 2012-02-21 Flexuspine, Inc. Dynamic interbody device
KR100869236B1 (ko) * 2006-09-14 2008-11-18 삼성전자주식회사 커패시터 제조 방법 및 이를 사용한 디램 장치의 제조 방법
JP2008108761A (ja) * 2006-10-23 2008-05-08 Elpida Memory Inc ダイナミックランダムアクセスメモリの製造方法
WO2008157208A2 (en) 2007-06-13 2008-12-24 Incyte Corporation Salts of the janus kinase inhibitor (r)-3-(4-(7h-pyrrolo[2,3-d]pyrimidin-4-yl)-1h-pyrazol-1-yl)-3-cyclopentylpropanenitrile
US20090001438A1 (en) * 2007-06-29 2009-01-01 Doyle Brian S Isolation of MIM FIN DRAM capacitor
JP2009200517A (ja) * 2009-04-28 2009-09-03 Renesas Technology Corp 半導体装置の製造方法
JP2011049601A (ja) * 2010-12-03 2011-03-10 Renesas Electronics Corp 半導体装置
CN106463352B (zh) * 2014-06-13 2020-06-19 英特尔公司 借助于电子束的层上单向金属

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0144902B1 (ko) * 1995-04-17 1998-07-01 김광호 불휘발성 메모리장치 및 그 제조방법
TW318933B (en) * 1996-03-08 1997-11-01 Hitachi Ltd Semiconductor IC device having a memory and a logic circuit implemented with a single chip
US5792681A (en) * 1997-01-15 1998-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Fabrication process for MOSFET devices and a reproducible capacitor structure
US6008084A (en) * 1998-02-27 1999-12-28 Vanguard International Semiconductor Corporation Method for fabricating low resistance bit line structures, along with bit line structures exhibiting low bit line to bit line coupling capacitance

Also Published As

Publication number Publication date
JP3869128B2 (ja) 2007-01-17
KR20000023051A (ko) 2000-04-25
US6069038A (en) 2000-05-30
TW419813B (en) 2001-01-21
KR100702869B1 (ko) 2007-04-04
JP2000091535A (ja) 2000-03-31

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19990910

AMDR Request for amendment
PG1501 Laying open of application
PC0501 Invalidation of application

Patent event code: PC05012S01D

Patent event date: 20000812

Comment text: Notice for Disposition of Invalidation

Patent event code: PC05011S01I

Patent event date: 19990916

Comment text: Request for Amendment

U051 Notice for disposition of invalidation