KR102889307B1 - 희생 캡핑 층으로서의 자가-조립된 모노층 - Google Patents

희생 캡핑 층으로서의 자가-조립된 모노층

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Publication number
KR102889307B1
KR102889307B1 KR1020227022922A KR20227022922A KR102889307B1 KR 102889307 B1 KR102889307 B1 KR 102889307B1 KR 1020227022922 A KR1020227022922 A KR 1020227022922A KR 20227022922 A KR20227022922 A KR 20227022922A KR 102889307 B1 KR102889307 B1 KR 102889307B1
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substrate
metal surface
capping layer
dielectric material
sacrificial capping
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Korean (ko)
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KR20220113444A (ko
Inventor
네그레이라 아인호아 로모
유미코 가와노
디나 트리요소
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도쿄엘렉트론가부시키가이샤
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/61—Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
    • H01L21/76883—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • H01L21/32—
    • H01L21/6715—
    • H01L21/76829—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6342—Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6504—In-situ cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7618—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating carrousel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0448—Apparatus for applying a liquid, a resin, an ink or the like

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
KR1020227022922A 2019-12-10 2020-12-08 희생 캡핑 층으로서의 자가-조립된 모노층 Active KR102889307B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201962946243P 2019-12-10 2019-12-10
US62/946,243 2019-12-10
PCT/US2020/063770 WO2021118993A1 (en) 2019-12-10 2020-12-08 Self-assembled monolayers as sacrificial capping layers

Publications (2)

Publication Number Publication Date
KR20220113444A KR20220113444A (ko) 2022-08-12
KR102889307B1 true KR102889307B1 (ko) 2025-11-20

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KR1020227022922A Active KR102889307B1 (ko) 2019-12-10 2020-12-08 희생 캡핑 층으로서의 자가-조립된 모노층

Country Status (6)

Country Link
US (1) US11915973B2 (https=)
JP (1) JP7627432B2 (https=)
KR (1) KR102889307B1 (https=)
CN (1) CN114830323B (https=)
TW (1) TWI865682B (https=)
WO (1) WO2021118993A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024523510A (ja) 2021-07-06 2024-06-28 東京エレクトロン株式会社 自己組織化単分子層を使用する選択的な膜形成
US11990369B2 (en) * 2021-08-20 2024-05-21 Applied Materials, Inc. Selective patterning with molecular layer deposition
JP2023182324A (ja) * 2022-06-14 2023-12-26 東京エレクトロン株式会社 成膜方法及び成膜装置
JP2024049188A (ja) * 2022-09-28 2024-04-09 東京エレクトロン株式会社 膜形成方法及び基板処理装置
JP2024081396A (ja) * 2022-12-06 2024-06-18 東京エレクトロン株式会社 成膜方法及び成膜装置
US12604685B2 (en) * 2023-07-19 2026-04-14 Tokyo Electron Limited Methods for controlling spin-on self-assembled monolayer (SAM) selectivity
JP2025087989A (ja) * 2023-11-30 2025-06-11 東京エレクトロン株式会社 成膜方法及び成膜装置
US20260053045A1 (en) * 2024-08-16 2026-02-19 Applied Materials, Inc. Integrated encapsulation deposition with metal recovery and passivation

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019018379A1 (en) * 2017-07-18 2019-01-24 Applied Materials, Inc. METHODS OF DEPOSITING BLOCKING LAYERS ON METAL SURFACES
JP2019515493A (ja) * 2016-04-25 2019-06-06 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 自己組織化単分子層処理のための化学物質供給チャンバ
WO2019202418A1 (en) * 2018-04-19 2019-10-24 International Business Machines Corporation Polymerizable self-assembled monolayers for use in atomic layer deposition

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6530380B1 (en) * 1999-11-19 2003-03-11 Chartered Semiconductor Manufacturing Ltd. Method for selective oxide etching in pre-metal deposition
US7468105B2 (en) * 2001-10-16 2008-12-23 Micron Technology, Inc. CMP cleaning composition with microbial inhibitor
US7387362B2 (en) * 2005-03-18 2008-06-17 Hewlett-Packard Development Company, L.P. Methods and architecture for applying self-assembled monolayer(s)
CN101903990B (zh) * 2007-12-18 2013-11-06 杨秉春 嵌入式互连系统的形成方法、双重嵌入式互连系统的形成方法及集成电路装置的形成方法
US7875519B2 (en) * 2008-05-21 2011-01-25 Intel Corporation Metal gate structure and method of manufacturing same
WO2010032616A1 (ja) 2008-09-19 2010-03-25 三菱瓦斯化学株式会社 銅配線表面保護液および半導体回路の製造方法
AU2010310750B2 (en) * 2009-10-23 2015-02-26 President And Fellows Of Harvard College Self-aligned barrier and capping layers for interconnects
CN102270607B (zh) * 2010-06-03 2014-01-29 中国科学院微电子研究所 栅极堆叠的制造方法和半导体器件
US8728720B2 (en) * 2010-06-08 2014-05-20 The Regents Of The University Of California Arbitrary pattern direct nanostructure fabrication methods and system
EP2674996A1 (en) * 2012-06-15 2013-12-18 Imec VZW Method for growing nanostructures in recessed structures
JP6552009B2 (ja) 2013-12-17 2019-07-31 東京エレクトロン株式会社 基板への周期的オルガノシリケートまたは自己組織化モノレイヤのスピンオンコーティングのためのシステムおよび方法
CN107406977A (zh) 2015-02-26 2017-11-28 应用材料公司 使用自组装单层的选择性电介质沉积的方法
US10316406B2 (en) 2015-10-21 2019-06-11 Ultratech, Inc. Methods of forming an ALD-inhibiting layer using a self-assembled monolayer
JP2017222928A (ja) * 2016-05-31 2017-12-21 東京エレクトロン株式会社 表面処理による選択的堆積
US10068764B2 (en) 2016-09-13 2018-09-04 Tokyo Electron Limited Selective metal oxide deposition using a self-assembled monolayer surface pretreatment
TWI739984B (zh) * 2017-01-31 2021-09-21 美商應用材料股份有限公司 就圖案化應用進行選擇性沉積之方案
US10276379B2 (en) * 2017-04-07 2019-04-30 Applied Materials, Inc. Treatment approach to improve film roughness by improving nucleation/adhesion of silicon oxide
KR102709865B1 (ko) 2017-05-05 2024-09-26 퀀텀-에스아이 인코포레이티드 생물학적 반응에 있어서 개질된 표면 반응성 및 오손방지 특성을 갖는 기재
US10586734B2 (en) * 2017-11-20 2020-03-10 Tokyo Electron Limited Method of selective film deposition for forming fully self-aligned vias
US10655217B2 (en) * 2018-05-01 2020-05-19 Spts Technologies Limited Method of forming a passivation layer on a substrate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019515493A (ja) * 2016-04-25 2019-06-06 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 自己組織化単分子層処理のための化学物質供給チャンバ
WO2019018379A1 (en) * 2017-07-18 2019-01-24 Applied Materials, Inc. METHODS OF DEPOSITING BLOCKING LAYERS ON METAL SURFACES
WO2019202418A1 (en) * 2018-04-19 2019-10-24 International Business Machines Corporation Polymerizable self-assembled monolayers for use in atomic layer deposition

Also Published As

Publication number Publication date
JP2023505992A (ja) 2023-02-14
TW202135135A (zh) 2021-09-16
CN114830323B (zh) 2026-03-20
CN114830323A (zh) 2022-07-29
WO2021118993A1 (en) 2021-06-17
US20210175118A1 (en) 2021-06-10
US11915973B2 (en) 2024-02-27
KR20220113444A (ko) 2022-08-12
TWI865682B (zh) 2024-12-11
JP7627432B2 (ja) 2025-02-06

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