KR102596118B1 - 적층형 게이트를 구비한 반도체 장치 및 그 제조 방법 - Google Patents

적층형 게이트를 구비한 반도체 장치 및 그 제조 방법 Download PDF

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KR102596118B1
KR102596118B1 KR1020207018472A KR20207018472A KR102596118B1 KR 102596118 B1 KR102596118 B1 KR 102596118B1 KR 1020207018472 A KR1020207018472 A KR 1020207018472A KR 20207018472 A KR20207018472 A KR 20207018472A KR 102596118 B1 KR102596118 B1 KR 102596118B1
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gate
fet
conductive trace
semiconductor device
routing
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KR20200085897A (ko
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제프리 스미스
안톤 제이 데빌러스
칸다바라 엔 타필리
섭하딥 칼
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도쿄엘렉트론가부시키가이샤
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    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
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    • H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
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    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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KR1020207018472A 2017-12-04 2018-12-03 적층형 게이트를 구비한 반도체 장치 및 그 제조 방법 Active KR102596118B1 (ko)

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US201762594354P 2017-12-04 2017-12-04
US62/594,354 2017-12-04
PCT/US2018/063618 WO2019112953A1 (en) 2017-12-04 2018-12-03 Semiconductor apparatus having stacked gates and method of manufacture thereof

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KR20200085897A KR20200085897A (ko) 2020-07-15
KR102596118B1 true KR102596118B1 (ko) 2023-10-30

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US (2) US10833078B2 (https=)
JP (1) JP7205045B2 (https=)
KR (1) KR102596118B1 (https=)
CN (1) CN111542923A (https=)
TW (1) TWI784099B (https=)
WO (1) WO2019112953A1 (https=)

Families Citing this family (131)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9583486B1 (en) * 2015-11-19 2017-02-28 International Business Machines Corporation Stable work function for narrow-pitch devices
US10833078B2 (en) * 2017-12-04 2020-11-10 Tokyo Electron Limited Semiconductor apparatus having stacked gates and method of manufacture thereof
US10276452B1 (en) 2018-01-11 2019-04-30 International Business Machines Corporation Low undercut N-P work function metal patterning in nanosheet replacement metal gate process
US12408431B2 (en) * 2018-04-06 2025-09-02 International Business Machines Corporation Gate stack quality for gate-all-around field-effect transistors
US11362189B2 (en) * 2018-09-27 2022-06-14 Intel Corporation Stacked self-aligned transistors with single workfunction metal
FR3090998B1 (fr) * 2018-12-21 2022-12-09 Commissariat Energie Atomique Architecture à transistors n et p superposes a structure de canal formee de nanofils
JP7364922B2 (ja) * 2018-12-26 2023-10-19 株式会社ソシオネクスト 半導体集積回路装置
US11764263B2 (en) * 2019-01-04 2023-09-19 Intel Corporation Gate-all-around integrated circuit structures having depopulated channel structures using multiple bottom-up oxidation approaches
US10886275B2 (en) * 2019-02-04 2021-01-05 International Business Machines Corporation Nanosheet one transistor dynamic random access device with silicon/silicon germanium channel and common gate structure
US20200294969A1 (en) * 2019-03-15 2020-09-17 Intel Corporation Stacked transistors with dielectric between source/drain materials of different strata
DE102020106252A1 (de) 2019-04-12 2020-10-15 Taiwan Semiconductor Manufacturing Co., Ltd. Integrierte schaltung
US11769836B2 (en) * 2019-05-07 2023-09-26 Intel Corporation Gate-all-around integrated circuit structures having nanowires with tight vertical spacing
KR102759882B1 (ko) * 2019-05-29 2025-02-04 삼성전자주식회사 반도체 장치 및 그 제조 방법
US11362091B2 (en) * 2019-06-26 2022-06-14 Tokyo Electron Limited Multiple nano layer transistor layers with different transistor architectures for improved circuit layout and performance
US20210005604A1 (en) * 2019-07-03 2021-01-07 Qualcomm Incorporated Nanosheet Transistor Stack
US11264289B2 (en) * 2019-07-11 2022-03-01 Tokyo Electron Limited Method for threshold voltage tuning through selective deposition of high-K metal gate (HKMG) film stacks
US11488947B2 (en) * 2019-07-29 2022-11-01 Tokyo Electron Limited Highly regular logic design for efficient 3D integration
US11450671B2 (en) 2019-08-07 2022-09-20 Tokyo Electron Limited Semiconductor apparatus having stacked devices and method of manufacture thereof
US11574845B2 (en) * 2019-08-07 2023-02-07 Tokyo Electron Limited Apparatus and method for simultaneous formation of diffusion break, gate cut, and independent N and P gates for 3D transistor devices
JP6950096B2 (ja) * 2019-09-13 2021-10-13 株式会社日立ハイテク 半導体装置の製造方法及びプラズマ処理装置
US11195832B2 (en) * 2019-10-03 2021-12-07 Tokyo Electron Limited High performance nanosheet fabrication method with enhanced high mobility channel elements
US11133310B2 (en) 2019-10-03 2021-09-28 Tokyo Electron Limited Method of making multiple nano layer transistors to enhance a multiple stack CFET performance
US11735525B2 (en) * 2019-10-21 2023-08-22 Tokyo Electron Limited Power delivery network for CFET with buried power rails
US11502168B2 (en) 2019-10-30 2022-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Tuning threshold voltage in nanosheet transitor devices
JP7610131B2 (ja) * 2019-12-20 2025-01-08 株式会社ソシオネクスト 半導体記憶装置
US11362096B2 (en) * 2019-12-27 2022-06-14 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure and method for forming the same
DE102020110792B4 (de) * 2019-12-27 2022-08-25 Taiwan Semiconductor Manufacturing Co., Ltd. Halbleitervorrichtungsstruktur mit Finnenstruktur und mehreren Nanostrukturen und Verfahren zum Bilden derselben
US11362090B2 (en) * 2020-01-31 2022-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having buried logic conductor type of complementary field effect transistor, method of generating layout diagram and system for same
DE102020125647A1 (de) 2020-01-31 2021-08-05 Taiwan Semiconductor Manufacturing Co., Ltd. Halbleitervorrichtung mit Komplementärfeldeffekttransistor des Typs mit vergrabenenen Logikleitern, Layout-Diagramm-Herstellungsverfahren und System dafür
US11469321B2 (en) 2020-02-27 2022-10-11 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device
EP3886143A1 (en) * 2020-03-23 2021-09-29 Imec VZW Method for filling a space in a semiconductor device
EP3886145A1 (en) 2020-03-24 2021-09-29 Imec VZW Method for processing a nanosheet device
US11495661B2 (en) * 2020-04-07 2022-11-08 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device including gate barrier layer
US11798851B2 (en) * 2020-04-14 2023-10-24 International Business Machines Corporation Work function metal patterning for nanosheet CFETs
US11658220B2 (en) 2020-04-24 2023-05-23 Taiwan Semiconductor Manufacturing Company, Ltd. Drain side recess for back-side power rail device
TWI787787B (zh) 2020-04-24 2022-12-21 台灣積體電路製造股份有限公司 半導體電晶體裝置及形成半導體電晶體裝置的方法
US11581224B2 (en) * 2020-05-08 2023-02-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming long channel back-side power rail device
CN115552604A (zh) * 2020-05-14 2022-12-30 株式会社索思未来 半导体装置及其制造方法
DE102020134570B4 (de) * 2020-05-27 2024-10-24 Taiwan Semiconductor Manufacturing Co., Ltd. Halbleitervorrichtung und -verfahren
US11532703B2 (en) 2020-05-27 2022-12-20 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method
DE102020124124B4 (de) * 2020-05-28 2022-01-27 Taiwan Semiconductor Manufacturing Co., Ltd. Selbstjustierende rückseitige source-kontakt-struktur und verfahren zu ihrer herstellung
US11948987B2 (en) 2020-05-28 2024-04-02 Taiwan Semiconductor Manufacturing Co., Ltd. Self-aligned backside source contact structure
US11842919B2 (en) * 2020-06-11 2023-12-12 Tokyo Electron Limited Method of making 3D isolation
US11948918B2 (en) 2020-06-15 2024-04-02 Taiwan Semiconductor Manufacturing Co., Ltd. Redistribution structure for semiconductor device and method of forming same
US11393819B2 (en) * 2020-07-09 2022-07-19 Qualcomm Incorporated Semiconductor device implemented with buried rails
US11276643B2 (en) * 2020-07-22 2022-03-15 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with backside spacer and methods of forming the same
KR102836756B1 (ko) 2020-07-29 2025-07-18 삼성전자주식회사 반도체 장치
US11862701B2 (en) 2020-07-31 2024-01-02 Taiwan Semiconductor Manufacturing Co., Ltd. Stacked multi-gate structure and methods of fabricating the same
US11437379B2 (en) 2020-09-18 2022-09-06 Qualcomm Incorporated Field-effect transistors (FET) circuits employing topside and backside contacts for topside and backside routing of FET power and logic signals, and related complementary metal oxide semiconductor (CMOS) circuits
US11404374B2 (en) * 2020-09-30 2022-08-02 Qualcomm Incorporated Circuits employing a back side-front side connection structure for coupling back side routing to front side routing, and related complementary metal oxide semiconductor (CMOS) circuits and methods
US11646318B2 (en) 2020-09-30 2023-05-09 Tokyo Electron Limited Connections from buried interconnects to device terminals in multiple stacked devices structures
US11502167B2 (en) 2020-10-02 2022-11-15 Samsung Electronics Co., Ltd. Semiconductor device having stepped multi-stack transistor structure
US11437369B2 (en) 2020-10-02 2022-09-06 Samsung Electronics Co., Ltd Array of multi-stack nanosheet structures
US11670677B2 (en) * 2020-10-02 2023-06-06 Samsung Electronics Co., Ltd. Crossing multi-stack nanosheet structure and method of manufacturing the same
US11355640B1 (en) 2020-11-16 2022-06-07 Samsung Electronics Co., Ltd. Hybrid multi-stack semiconductor device including self-aligned channel structure and method of manufacturing the same
CN116250077B (zh) * 2020-11-24 2025-08-22 中芯国际集成电路制造(上海)有限公司 半导体结构及半导体结构的形成方法
KR102840475B1 (ko) * 2020-12-01 2025-07-29 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US11923364B2 (en) * 2020-12-04 2024-03-05 Tokyo Electron Limited Double cross-couple for two-row flip-flop using CFET
US12224281B2 (en) 2020-12-04 2025-02-11 Tokyo Electron Limited Interdigitated device stack
US11502169B2 (en) * 2020-12-21 2022-11-15 International Business Machines Corporation Nanosheet semiconductor devices with n/p boundary structure
US12199152B2 (en) 2021-01-18 2025-01-14 Samsung Electronics Co., Ltd. Selective single diffusion/electrical barrier
US12183738B2 (en) * 2021-01-29 2024-12-31 Samsung Electronics Co., Ltd. Cross-coupled gate design for stacked device with separated top-down gate
US12446291B2 (en) * 2021-02-19 2025-10-14 Tokyo Electron Limited Inverted top-tier FET for multi-tier gate-on-gate 3-dimension integration (3Di)
WO2022192362A1 (en) * 2021-03-11 2022-09-15 Tokyo Electron Limited 3d device with a plurality of core wiring layout architecture
US11444170B1 (en) 2021-03-12 2022-09-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with backside self-aligned power rail and methods of forming the same
US11723187B2 (en) 2021-03-16 2023-08-08 Tokyo Electron Limited Three-dimensional memory cell structure
US11688742B2 (en) 2021-03-19 2023-06-27 Samsung Electronics Co., Ltd. Different diffusion break structures for three-dimensional stacked semiconductor device
US11855079B2 (en) * 2021-04-30 2023-12-26 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit with backside trench for metal gate definition
US12557377B2 (en) 2021-05-13 2026-02-17 Tokyo Electron Limited Inverted cross-couple for top-tier FET for multi-tier gate-on-gate 3DI
CN115347043A (zh) * 2021-05-14 2022-11-15 三星电子株式会社 纳米片晶体管器件及其形成方法
US12027598B2 (en) 2021-05-26 2024-07-02 Taiwan Semiconductor Manufacturing Company Ltd. Buried pad for use with gate-all-around device
US20220399334A1 (en) * 2021-06-14 2022-12-15 Intel Corporation Integrated circuit structures with backside self-aligned conductive via bar
US20220399333A1 (en) * 2021-06-14 2022-12-15 Intel Corporation Integrated circuit structures having metal gates with reduced aspect ratio cuts
US11984401B2 (en) 2021-06-22 2024-05-14 International Business Machines Corporation Stacked FET integration with BSPDN
KR102864496B1 (ko) * 2021-06-24 2025-09-24 삼성전자주식회사 반도체 장치 및 그 제조 방법
US12568651B2 (en) 2021-06-29 2026-03-03 Tokyo Electron Limited Semiconductor structure having stacked gates and method of manufacture thereof
US20230017350A1 (en) * 2021-07-15 2023-01-19 Tokyo Electron Limited Independent gate contacts for cfet
US11764154B2 (en) 2021-07-30 2023-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Power rail and signal line arrangement in integrated circuits having stacked transistors
US11916073B2 (en) 2021-08-03 2024-02-27 International Business Machines Corporation Stacked complementary field effect transistors
US12087770B2 (en) * 2021-08-05 2024-09-10 International Business Machines Corporation Complementary field effect transistor devices
US20230047194A1 (en) * 2021-08-10 2023-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure with isolation feature and method for manufacturing the same
US12243946B2 (en) * 2021-08-12 2025-03-04 Samsung Electronics Co., Ltd. Integrated circuit devices including a common gate electrode and methods of forming the same
US11791199B2 (en) 2021-08-19 2023-10-17 International Business Machines Corporation Nanosheet IC device with single diffusion break
US12369399B2 (en) * 2021-08-25 2025-07-22 Intel Corporation Gate-to-gate isolation for stacked transistor architecture via selective dielectric deposition structure
US12324216B2 (en) * 2021-08-30 2025-06-03 Taiwan Semiconductor Manufacturing Company, Ltd. Metal gates for multi-gate devices and fabrication methods thereof
US12001772B2 (en) * 2021-09-24 2024-06-04 International Business Machines Corporation Ultra-short-height standard cell architecture
US12310061B2 (en) 2021-09-25 2025-05-20 International Business Machines Corporation Nanosheet transistor devices with different active channel widths
US12183786B2 (en) 2021-09-27 2024-12-31 Samsung Electronics Co., Ltd. Multi-stack semiconductor device with zebra nanosheet structure
US11990412B2 (en) * 2021-09-29 2024-05-21 International Business Machines Corporation Buried power rails located in a base layer including first, second, and third etch stop layers
US11881393B2 (en) * 2021-09-29 2024-01-23 Advanced Micro Devices, Inc. Cross field effect transistor library cell architecture design
KR102853756B1 (ko) * 2021-10-14 2025-09-01 삼성전자주식회사 반도체 장치
KR102947675B1 (ko) 2021-10-28 2026-04-06 삼성전자주식회사 3차원 반도체 소자 및 그의 제조 방법
US20230134379A1 (en) * 2021-11-03 2023-05-04 Intel Corporation Lattice stack for internal spacer fabrication
US12336294B2 (en) * 2021-11-10 2025-06-17 International Business Machines Corporation Gate-cut and separation techniques for enabling independent gate control of stacked transistors
EP4191653A1 (en) * 2021-12-02 2023-06-07 Imec VZW A complementary field-effect transistor device
US12342614B2 (en) * 2021-12-06 2025-06-24 Intel Corporation Asymmetric gate structures and contacts for stacked transistors
US11894436B2 (en) * 2021-12-06 2024-02-06 International Business Machines Corporation Gate-all-around monolithic stacked field effect transistors having multiple threshold voltages
US20230178544A1 (en) * 2021-12-06 2023-06-08 International Business Machines Corporation Complementary field effect transistors having multiple voltage thresholds
US20230178435A1 (en) * 2021-12-07 2023-06-08 Taiwan Semiconductor Manufacturing Co., Ltd. Complementary fet (cfet) devices and methods
US12278237B2 (en) * 2021-12-08 2025-04-15 International Business Machines Corporation Stacked FETS with non-shared work function metals
US20230178549A1 (en) * 2021-12-08 2023-06-08 International Business Machines Corporation Stacked field effect transistors
US12310072B2 (en) * 2021-12-10 2025-05-20 International Business Machines Corporation Middle of line structure with stacked devices
US12349406B2 (en) 2021-12-17 2025-07-01 International Business Machines Corporation Hybrid gate cut for stacked transistors
US12363990B2 (en) * 2022-01-06 2025-07-15 International Business Machines Corporation Upper and lower gate configurations of monolithic stacked FinFET transistors
WO2023166608A1 (ja) * 2022-03-02 2023-09-07 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2023170782A1 (ja) * 2022-03-08 2023-09-14 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体メモリ装置
JP7705671B2 (ja) * 2022-03-16 2025-07-10 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体を用いたメモリ装置
US12349458B2 (en) 2022-03-22 2025-07-01 International Business Machines Corporation Staggered stacked circuits with increased effective width
US12402408B2 (en) * 2022-03-25 2025-08-26 International Business Machines Corporation Stacked FETS including devices with thick gate oxide
US12575113B2 (en) 2022-03-26 2026-03-10 International Business Machines Corporation High density memory with stacked nanosheet transistors
US20230317717A1 (en) * 2022-03-30 2023-10-05 Arm Limited Multi-Device Stack Structure
KR102905611B1 (ko) * 2022-05-02 2025-12-29 삼성전자주식회사 반도체 장치
KR102913544B1 (ko) * 2022-05-10 2026-01-15 삼성전자주식회사 반도체 장치
US12550373B2 (en) * 2022-06-03 2026-02-10 Intel Corporation Selective removal of channel bodies in stacked gate-all-around (GAA) device structures
US20230411386A1 (en) * 2022-06-20 2023-12-21 International Business Machines Corporation Method and structure of forming contacts and gates for staggered fet
US12328859B2 (en) * 2022-06-30 2025-06-10 International Business Machines Corporation Stacked FET SRAM
KR20240006243A (ko) 2022-07-06 2024-01-15 삼성전자주식회사 반도체 장치
CN114937695B (zh) * 2022-07-25 2022-10-21 北京芯可鉴科技有限公司 双沟道ldmos器件及其制备方法以及芯片
US12490480B2 (en) * 2022-09-16 2025-12-02 International Business Machines Corporation Stacked FETS with contact placeholder structures
US12610513B2 (en) 2022-09-21 2026-04-21 International Business Machines Corporation SRAM with improved program and sensing margin for scaled nanosheet devices
US12557260B2 (en) * 2022-10-05 2026-02-17 International Business Machines Corporation Stacked-FET SRAM cell with bottom pFET
US20240186324A1 (en) * 2022-12-05 2024-06-06 International Business Machines Corporation Latch cross couple for stacked and stepped fet
US12446264B2 (en) 2022-12-20 2025-10-14 Qualcomm Incorporated Complementary field effect transistor (CFET) with balanced N and P drive current
EP4435843A1 (en) * 2023-03-22 2024-09-25 Imec VZW A cfet cell and a method of fabricating a cfet cell
US20240321641A1 (en) * 2023-03-24 2024-09-26 Applied Materials, Inc. Fabrication of high aspect ratio electronic devices with minimal sidewall spacer loss
US20240332295A1 (en) * 2023-03-30 2024-10-03 International Business Machines Corporation Field effect transistor high aspect ratio patterning
US20240355879A1 (en) * 2023-04-18 2024-10-24 Samsung Electronics Co., Ltd. Stacked integrated circuit devices including staggered gate structures and methods of forming the same
US20250006736A1 (en) * 2023-06-27 2025-01-02 International Business Machines Corporation Stacked nanosheet fets with gate dielectric fill
US20250167110A1 (en) * 2023-11-20 2025-05-22 Samsung Electronics Co., Ltd. Cell block for high-performance semiconductor device
WO2025165656A1 (en) * 2024-02-02 2025-08-07 Applied Materials, Inc. Gate integration in complementary field effect transistor (cfet) devices
WO2025211237A1 (ja) * 2024-04-03 2025-10-09 株式会社ソシオネクスト 半導体集積回路装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005340810A (ja) 2004-05-25 2005-12-08 Samsung Electronics Co Ltd マルチ−ブリッジチャンネル型ｍｏｓトランジスタの製造方法
US20090267128A1 (en) 2008-04-23 2009-10-29 Hiroshi Maejima Three dimensional stacked nonvolatile semiconductor memory
US20130200331A1 (en) 2012-02-06 2013-08-08 National Institute Of Advanced Industrial Science And Technology Semiconductor storage device and method of manufacturing the same
US20170271356A1 (en) 2016-03-18 2017-09-21 Kabushiki Kaisha Toshiba Semiconductor memory device and method of manufacturing the same

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7052941B2 (en) * 2003-06-24 2006-05-30 Sang-Yun Lee Method for making a three-dimensional integrated circuit structure
JP2009076879A (ja) * 2007-08-24 2009-04-09 Semiconductor Energy Lab Co Ltd 半導体装置
FR2923646A1 (fr) * 2007-11-09 2009-05-15 Commissariat Energie Atomique Cellule memoire sram dotee de transistors a structure multi-canaux verticale
US8574982B2 (en) 2010-02-25 2013-11-05 International Business Machines Corporation Implementing eDRAM stacked FET structure
US8492220B2 (en) 2010-08-09 2013-07-23 International Business Machines Corporation Vertically stacked FETs with series bipolar junction transistor
JP5651415B2 (ja) 2010-09-21 2015-01-14 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
JP2012146861A (ja) * 2011-01-13 2012-08-02 Toshiba Corp 半導体記憶装置
US9123567B2 (en) * 2011-12-19 2015-09-01 Intel Corporation CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture
KR101779031B1 (ko) * 2011-12-19 2017-09-18 인텔 코포레이션 수직 트랜지스터와 그 제조방법, 및 고전압 트랜지스터
KR101786453B1 (ko) * 2011-12-28 2017-10-18 인텔 코포레이션 집적 회로 디바이스의 트랜지스터들을 적층한 장치 및 제조방법
US20130270647A1 (en) * 2012-04-17 2013-10-17 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for nfet with high k metal gate
US8779551B2 (en) * 2012-06-06 2014-07-15 International Business Machines Corporation Gated diode structure for eliminating RIE damage from cap removal
US9368596B2 (en) * 2012-06-14 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for a field effect transistor
US9098666B2 (en) * 2012-11-28 2015-08-04 Qualcomm Incorporated Clock distribution network for 3D integrated circuit
US8952431B2 (en) 2013-05-09 2015-02-10 International Business Machines Corporation Stacked carbon-based FETs
US20150214239A1 (en) * 2013-12-05 2015-07-30 Conversant Intellectual Property Management Inc. Three dimensional non-volatile memory with charge storage node isolation
WO2015199644A1 (en) * 2014-06-23 2015-12-30 Intel Corporation Techniques for forming vertical transistor architectures
US9263260B1 (en) * 2014-12-16 2016-02-16 International Business Machines Corporation Nanowire field effect transistor with inner and outer gates
TWI538109B (zh) * 2015-06-04 2016-06-11 旺宏電子股份有限公司 積體電路及其製作與操作方法
WO2017027224A1 (en) 2015-08-07 2017-02-16 Tokyo Electron Limited Method of patterning without dummy gates
US9716042B1 (en) * 2015-12-30 2017-07-25 International Business Machines Corporation Fin field-effect transistor (FinFET) with reduced parasitic capacitance
US10741587B2 (en) 2016-03-11 2020-08-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, semiconductor wafer, module, electronic device, and manufacturing method the same
CN109564934B (zh) * 2016-04-25 2023-02-21 应用材料公司 水平环绕式栅极元件纳米线气隙间隔的形成
KR102228497B1 (ko) 2016-07-19 2021-03-15 도쿄엘렉트론가부시키가이샤 3 차원 반도체 디바이스 및 그 제조 방법
US10541174B2 (en) 2017-01-20 2020-01-21 Tokyo Electron Limited Interconnect structure and method of forming the same
US10833078B2 (en) * 2017-12-04 2020-11-10 Tokyo Electron Limited Semiconductor apparatus having stacked gates and method of manufacture thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005340810A (ja) 2004-05-25 2005-12-08 Samsung Electronics Co Ltd マルチ−ブリッジチャンネル型ｍｏｓトランジスタの製造方法
US20090267128A1 (en) 2008-04-23 2009-10-29 Hiroshi Maejima Three dimensional stacked nonvolatile semiconductor memory
JP2009266945A (ja) 2008-04-23 2009-11-12 Toshiba Corp 三次元積層不揮発性半導体メモリ
US20130200331A1 (en) 2012-02-06 2013-08-08 National Institute Of Advanced Industrial Science And Technology Semiconductor storage device and method of manufacturing the same
US20170271356A1 (en) 2016-03-18 2017-09-21 Kabushiki Kaisha Toshiba Semiconductor memory device and method of manufacturing the same

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