KR101724199B1 - 전자 부품 패키지의 제조 방법 - Google Patents

전자 부품 패키지의 제조 방법 Download PDF

Info

Publication number
KR101724199B1
KR101724199B1 KR1020150086549A KR20150086549A KR101724199B1 KR 101724199 B1 KR101724199 B1 KR 101724199B1 KR 1020150086549 A KR1020150086549 A KR 1020150086549A KR 20150086549 A KR20150086549 A KR 20150086549A KR 101724199 B1 KR101724199 B1 KR 101724199B1
Authority
KR
South Korea
Prior art keywords
hole
substrate
groove
mold
resin
Prior art date
Application number
KR1020150086549A
Other languages
English (en)
Korean (ko)
Other versions
KR20160010305A (ko
Inventor
히로카즈 오카다
무네오 미우라
Original Assignee
토와 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 토와 가부시기가이샤 filed Critical 토와 가부시기가이샤
Publication of KR20160010305A publication Critical patent/KR20160010305A/ko
Application granted granted Critical
Publication of KR101724199B1 publication Critical patent/KR101724199B1/ko

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/073—Apertured devices mounted on one or more rods passed through the apertures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020150086549A 2014-07-18 2015-06-18 전자 부품 패키지의 제조 방법 KR101724199B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014148258A JP6242763B2 (ja) 2014-07-18 2014-07-18 電子部品パッケージの製造方法
JPJP-P-2014-148258 2014-07-18

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020170040944A Division KR101807464B1 (ko) 2014-07-18 2017-03-30 전자 부품 패키지의 제조 방법

Publications (2)

Publication Number Publication Date
KR20160010305A KR20160010305A (ko) 2016-01-27
KR101724199B1 true KR101724199B1 (ko) 2017-04-06

Family

ID=55248958

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1020150086549A KR101724199B1 (ko) 2014-07-18 2015-06-18 전자 부품 패키지의 제조 방법
KR1020170040944A KR101807464B1 (ko) 2014-07-18 2017-03-30 전자 부품 패키지의 제조 방법

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020170040944A KR101807464B1 (ko) 2014-07-18 2017-03-30 전자 부품 패키지의 제조 방법

Country Status (4)

Country Link
JP (1) JP6242763B2 (zh)
KR (2) KR101724199B1 (zh)
CN (2) CN105321831B (zh)
TW (2) TWI644372B (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102592327B1 (ko) 2018-10-16 2023-10-20 삼성전자주식회사 반도체 패키지
TWI729453B (zh) * 2019-08-14 2021-06-01 華暉興業有限公司 功率模組之結構改良
CN112992836B (zh) * 2019-12-12 2023-01-17 珠海格力电器股份有限公司 一种铜桥双面散热的芯片及其制备方法
CN112017976B (zh) * 2020-11-02 2021-02-05 甬矽电子(宁波)股份有限公司 光电传感器封装结构制作方法和光电传感器封装结构

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001244609A (ja) * 2000-02-25 2001-09-07 Sony Corp 配線基板の製造方法及びそれにより得られた配線基板

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002124527A (ja) * 2000-10-16 2002-04-26 Sony Corp チップ状電子部品の製造方法、及びその製造に用いる疑似ウェーハの製造方法
JP3560585B2 (ja) * 2001-12-14 2004-09-02 松下電器産業株式会社 半導体装置の製造方法
US6900531B2 (en) * 2002-10-25 2005-05-31 Freescale Semiconductor, Inc. Image sensor device
US7944034B2 (en) * 2007-06-22 2011-05-17 Texas Instruments Incorporated Array molded package-on-package having redistribution lines
JP5215605B2 (ja) 2007-07-17 2013-06-19 ラピスセミコンダクタ株式会社 半導体装置の製造方法
JP2009302505A (ja) * 2008-05-15 2009-12-24 Panasonic Corp 半導体装置、および半導体装置の製造方法
US8030750B2 (en) * 2009-11-19 2011-10-04 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8039275B1 (en) * 2010-06-02 2011-10-18 Stats Chippac Ltd. Integrated circuit packaging system with rounded interconnect and method of manufacture thereof
JP5674346B2 (ja) * 2010-06-15 2015-02-25 ルネサスエレクトロニクス株式会社 半導体装置の製造方法、半導体装置、半導体装置の保管方法、半導体製造装置
US20120080787A1 (en) * 2010-10-05 2012-04-05 Qualcomm Incorporated Electronic Package and Method of Making an Electronic Package
JP5237346B2 (ja) * 2010-10-14 2013-07-17 Ｔｏｗａ株式会社 半導体チップの圧縮成形方法及び圧縮成形型
KR20120041020A (ko) * 2010-10-20 2012-04-30 하나 마이크론(주) 반도체 패키지 및 그 제조 방법
KR20120042240A (ko) * 2010-10-25 2012-05-03 삼성전자주식회사 Ｔｍｖ 패키지온패키지 제조방법
KR101075241B1 (ko) * 2010-11-15 2011-11-01 테세라, 인코포레이티드 유전체 부재에 단자를 구비하는 마이크로전자 패키지
US8461691B2 (en) * 2011-04-29 2013-06-11 Infineon Technologies Ag Chip-packaging module for a chip and a method for forming a chip-packaging module
US8658464B2 (en) * 2011-11-16 2014-02-25 Taiwan Semiconductor Manufacturing Company, Ltd. Mold chase design for package-on-package applications
TWI471952B (zh) * 2012-07-18 2015-02-01 矽品精密工業股份有限公司 晶片尺寸封裝件之製法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001244609A (ja) * 2000-02-25 2001-09-07 Sony Corp 配線基板の製造方法及びそれにより得られた配線基板

Also Published As

Publication number Publication date
CN105321831B (zh) 2018-07-06
CN105321831A (zh) 2016-02-10
JP2016025212A (ja) 2016-02-08
CN108962768B (zh) 2022-04-29
TW201719778A (zh) 2017-06-01
JP6242763B2 (ja) 2017-12-06
KR101807464B1 (ko) 2017-12-08
TWI576931B (zh) 2017-04-01
TWI644372B (zh) 2018-12-11
CN108962768A (zh) 2018-12-07
KR20160010305A (ko) 2016-01-27
KR20170040150A (ko) 2017-04-12
TW201604976A (zh) 2016-02-01

Similar Documents

Publication Publication Date Title
KR101807464B1 (ko) 전자 부품 패키지의 제조 방법
KR101679479B1 (ko) 패키지 온 패키지 구조체에서의 휨 제어
US9922943B2 (en) Chip-on-substrate packaging on carrier
US8445322B2 (en) Method of fabricating semiconductor package
CN101499445A (zh) 半导体器件及其制造方法
US9155205B2 (en) Electronic device and fabrication method thereof
KR20140147648A (ko) 집적 회로의 패키징에서의 정렬
US20140011325A1 (en) Method for manufacturing semiconductor package
US9960055B1 (en) Manufacturing method of semiconductor device
JP6567016B2 (ja) 電子部品パッケージの製造方法
KR102566145B1 (ko) 반도체 패키지의 제조 방법
KR102087683B1 (ko) 반도체 장치의 제조 방법
CN108682631B (zh) 一种led发光面板及其制造方法
KR101440342B1 (ko) 반도체 패키지 제조용 서포팅 장치 및 이를 이용한 반도체 패키지 제조 방법
TWI623984B (zh) 封裝結構及其製法
JP5889160B2 (ja) 電子機器の製造方法
JP2011040625A (ja) 半導体装置の製造方法
KR20130094965A (ko) 이미지 센서 패키지 및 그 제조 방법
KR20180117238A (ko) 반도체 패키지 및 그 제조 방법
JP2005051049A (ja) 機能モジュールおよびその製造方法

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E90F Notification of reason for final refusal
E701 Decision to grant or registration of patent right