KR101494627B1 - 반도체 기판 및 반도체 장치의 제작 방법 - Google Patents

반도체 기판 및 반도체 장치의 제작 방법 Download PDF

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KR101494627B1
KR101494627B1 KR20080091688A KR20080091688A KR101494627B1 KR 101494627 B1 KR101494627 B1 KR 101494627B1 KR 20080091688 A KR20080091688 A KR 20080091688A KR 20080091688 A KR20080091688 A KR 20080091688A KR 101494627 B1 KR101494627 B1 KR 101494627B1
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South Korea
Prior art keywords
single crystal
crystal semiconductor
semiconductor substrates
tray
base substrate
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Expired - Fee Related
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KR20080091688A
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English (en)
Korean (ko)
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KR20090031263A (ko
Inventor
순페이 야마자키
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가부시키가이샤 한도오따이 에네루기 켄큐쇼
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Thin Film Transistor (AREA)
KR20080091688A 2007-09-21 2008-09-18 반도체 기판 및 반도체 장치의 제작 방법 Expired - Fee Related KR101494627B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007244624A JP5250228B2 (ja) 2007-09-21 2007-09-21 半導体装置の作製方法
JPJP-P-2007-00244624 2007-09-21

Publications (2)

Publication Number Publication Date
KR20090031263A KR20090031263A (ko) 2009-03-25
KR101494627B1 true KR101494627B1 (ko) 2015-02-23

Family

ID=40472111

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20080091688A Expired - Fee Related KR101494627B1 (ko) 2007-09-21 2008-09-18 반도체 기판 및 반도체 장치의 제작 방법

Country Status (3)

Country Link
US (1) US8309429B2 (https=)
JP (1) JP5250228B2 (https=)
KR (1) KR101494627B1 (https=)

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JP5498670B2 (ja) * 2007-07-13 2014-05-21 株式会社半導体エネルギー研究所 半導体基板の作製方法
TWI437696B (zh) * 2007-09-21 2014-05-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
JP2009094488A (ja) * 2007-09-21 2009-04-30 Semiconductor Energy Lab Co Ltd 半導体膜付き基板の作製方法
JP5452900B2 (ja) 2007-09-21 2014-03-26 株式会社半導体エネルギー研究所 半導体膜付き基板の作製方法
TWI493609B (zh) * 2007-10-23 2015-07-21 半導體能源研究所股份有限公司 半導體基板、顯示面板及顯示裝置的製造方法
US8432021B2 (en) * 2009-05-26 2013-04-30 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of SOI substrate
WO2011017179A2 (en) 2009-07-28 2011-02-10 Gigasi Solar, Inc. Systems, methods and materials including crystallization of substrates via sub-melt laser anneal, as well as products produced by such processes
JP2011077504A (ja) * 2009-09-02 2011-04-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP5713603B2 (ja) * 2009-09-02 2015-05-07 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
WO2011066485A2 (en) * 2009-11-25 2011-06-03 Gigasi Solar, Inc. Systems, methods and products including features of laser irradiation and/or cleaving of silicon with other substrates or layers
US8741785B2 (en) 2011-10-27 2014-06-03 Applied Materials, Inc. Remote plasma radical treatment of silicon oxide
KR20130104546A (ko) 2012-03-14 2013-09-25 삼성디스플레이 주식회사 도너 필름용 트레이
JP6245791B2 (ja) * 2012-03-27 2017-12-13 日亜化学工業株式会社 縦型窒化物半導体素子およびその製造方法
FR3041364B1 (fr) * 2015-09-18 2017-10-06 Soitec Silicon On Insulator Procede de transfert de paves monocristallins

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JP2005203596A (ja) 2004-01-16 2005-07-28 Seiko Epson Corp 電気光学装置の製造方法、電気光学装置および電子機器
WO2007014320A2 (en) 2005-07-27 2007-02-01 Silicon Genesis Corporation Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process

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JP5460984B2 (ja) 2007-08-17 2014-04-02 株式会社半導体エネルギー研究所 半導体装置の作製方法
TWI437696B (zh) 2007-09-21 2014-05-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
JP5452900B2 (ja) 2007-09-21 2014-03-26 株式会社半導体エネルギー研究所 半導体膜付き基板の作製方法
JP2009094488A (ja) 2007-09-21 2009-04-30 Semiconductor Energy Lab Co Ltd 半導体膜付き基板の作製方法

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JP2005072043A (ja) 2003-08-26 2005-03-17 Shin Etsu Handotai Co Ltd 貼り合わせウエーハの製造方法およびｓｏｉウエーハ
JP2005203596A (ja) 2004-01-16 2005-07-28 Seiko Epson Corp 電気光学装置の製造方法、電気光学装置および電子機器
WO2007014320A2 (en) 2005-07-27 2007-02-01 Silicon Genesis Corporation Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process

Also Published As

Publication number Publication date
US20090081844A1 (en) 2009-03-26
US8309429B2 (en) 2012-11-13
KR20090031263A (ko) 2009-03-25
JP5250228B2 (ja) 2013-07-31
JP2009076706A (ja) 2009-04-09

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