KR101420603B1 - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

Info

Publication number
KR101420603B1
KR101420603B1 KR1020107001976A KR20107001976A KR101420603B1 KR 101420603 B1 KR101420603 B1 KR 101420603B1 KR 1020107001976 A KR1020107001976 A KR 1020107001976A KR 20107001976 A KR20107001976 A KR 20107001976A KR 101420603 B1 KR101420603 B1 KR 101420603B1
Authority
KR
South Korea
Prior art keywords
film
insulating film
conductive
semiconductor
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020107001976A
Other languages
English (en)
Korean (ko)
Other versions
KR20100047853A (ko
Inventor
타메이 다카노
테츠야 가케하타
순페이 야마자키
Original Assignee
가부시키가이샤 한도오따이 에네루기 켄큐쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 한도오따이 에네루기 켄큐쇼 filed Critical 가부시키가이샤 한도오따이 에네루기 켄큐쇼
Publication of KR20100047853A publication Critical patent/KR20100047853A/ko
Application granted granted Critical
Publication of KR101420603B1 publication Critical patent/KR101420603B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/691—IGFETs having charge trapping gate insulators, e.g. MNOS transistors having more than two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/471—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1020107001976A 2007-06-29 2008-06-11 반도체 장치 및 그 제조 방법 Expired - Fee Related KR101420603B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPJP-P-2007-173103 2007-06-29
JP2007173103 2007-06-29
PCT/JP2008/061077 WO2009004919A1 (en) 2007-06-29 2008-06-11 Semiconductor device and manufacturing method thereof

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020137014926A Division KR101404439B1 (ko) 2007-06-29 2008-06-11 메모리 장치 및 전자 기기

Publications (2)

Publication Number Publication Date
KR20100047853A KR20100047853A (ko) 2010-05-10
KR101420603B1 true KR101420603B1 (ko) 2014-07-17

Family

ID=40159337

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1020107001976A Expired - Fee Related KR101420603B1 (ko) 2007-06-29 2008-06-11 반도체 장치 및 그 제조 방법
KR1020137014926A Expired - Fee Related KR101404439B1 (ko) 2007-06-29 2008-06-11 메모리 장치 및 전자 기기

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020137014926A Expired - Fee Related KR101404439B1 (ko) 2007-06-29 2008-06-11 메모리 장치 및 전자 기기

Country Status (5)

Country Link
US (4) US7851279B2 (https=)
JP (2) JP2009033141A (https=)
KR (2) KR101420603B1 (https=)
CN (1) CN101689532B (https=)
WO (1) WO2009004919A1 (https=)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101534009B1 (ko) * 2008-10-21 2015-07-07 삼성디스플레이 주식회사 박막 트랜지스터 표시판과 그 제조 방법 및 박막 트랜지스터 표시판을 갖는 표시 장치
TW201023341A (en) * 2008-12-12 2010-06-16 Ind Tech Res Inst Integrated circuit structure
KR101782176B1 (ko) 2009-07-18 2017-09-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제조 방법
WO2011010542A1 (en) 2009-07-23 2011-01-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
KR101772639B1 (ko) * 2009-10-16 2017-08-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR20190066086A (ko) 2009-11-06 2019-06-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
WO2011058864A1 (en) * 2009-11-13 2011-05-19 Semiconductor Energy Laboratory Co., Ltd. Device including nonvolatile memory element
US8907392B2 (en) 2011-12-22 2014-12-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device including stacked sub memory cells
JP2014045175A (ja) 2012-08-02 2014-03-13 Semiconductor Energy Lab Co Ltd 半導体装置
KR20150033155A (ko) * 2013-09-23 2015-04-01 삼성디스플레이 주식회사 박막 트랜지스터 및 그 제조 방법
KR102386362B1 (ko) 2013-12-02 2022-04-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치
US9349751B2 (en) 2013-12-12 2016-05-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN106663394B (zh) * 2014-07-23 2019-10-22 索尼公司 显示装置、制造显示装置的方法以及电子设备
US10553690B2 (en) * 2015-08-04 2020-02-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US9847406B2 (en) 2015-08-27 2017-12-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, storage device, resistor circuit, display device, and electronic device
JP6811084B2 (ja) * 2015-12-18 2021-01-13 株式会社半導体エネルギー研究所 半導体装置
KR102763624B1 (ko) * 2018-02-12 2025-02-10 삼성디스플레이 주식회사 유기 발광 표시 장치
US11756934B2 (en) * 2021-04-16 2023-09-12 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05145073A (ja) * 1991-11-22 1993-06-11 Seiko Epson Corp 相補型薄膜トランジスタ
JPH1154761A (ja) * 1997-08-01 1999-02-26 Semiconductor Energy Lab Co Ltd 半導体集積回路およびその作製方法
JP2001298100A (ja) * 2000-02-01 2001-10-26 Semiconductor Energy Lab Co Ltd 不揮発性メモリ、半導体装置、およびその作製方法
US20030107077A1 (en) * 1997-09-20 2003-06-12 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and manufacturing method thereof

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5060034A (en) * 1988-11-01 1991-10-22 Casio Computer Co., Ltd. Memory device using thin film transistors having an insulation film with si/n composition ratio of 0.85 to 1.1
JP3070099B2 (ja) * 1990-12-13 2000-07-24 ソニー株式会社 スタティックｒａｍ
JP3082288B2 (ja) * 1991-05-09 2000-08-28 カシオ計算機株式会社 薄膜メモリトランジスタ及びその製造方法
JPH0730001A (ja) * 1993-07-09 1995-01-31 Mitsubishi Electric Corp 半導体装置
JP2643833B2 (ja) 1994-05-30 1997-08-20 日本電気株式会社 半導体記憶装置及びその製造方法
JP3253808B2 (ja) 1994-07-07 2002-02-04 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US5877054A (en) 1995-06-29 1999-03-02 Sharp Kabushiki Kaisha Method of making nonvolatile semiconductor memory
KR100460845B1 (ko) 1995-08-31 2005-05-24 가부시끼가이샤 히다치 세이사꾸쇼 반도체불휘발성기억장치및그것을사용한컴퓨터시스템
KR100205388B1 (ko) 1995-09-12 1999-07-01 구자홍 액정표시장치 및 그 제조방법
JPH09186335A (ja) * 1995-12-27 1997-07-15 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
TW347567B (en) 1996-03-22 1998-12-11 Philips Eloctronics N V Semiconductor device and method of manufacturing a semiconductor device
JP4401448B2 (ja) 1997-02-24 2010-01-20 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6060743A (en) 1997-05-21 2000-05-09 Kabushiki Kaisha Toshiba Semiconductor memory device having multilayer group IV nanocrystal quantum dot floating gate and method of manufacturing the same
US6307214B1 (en) 1997-06-06 2001-10-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor thin film and semiconductor device
JP4318768B2 (ja) 1997-07-23 2009-08-26 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3265569B2 (ja) * 1998-04-15 2002-03-11 日本電気株式会社 半導体装置及びその製造方法
JP2000200842A (ja) 1998-11-04 2000-07-18 Sony Corp 不揮発性半導体記憶装置、製造方法および書き込み方法
US8158980B2 (en) 2001-04-19 2012-04-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a pixel matrix circuit that includes a pixel TFT and a storage capacitor
JP4202502B2 (ja) * 1998-12-28 2008-12-24 株式会社半導体エネルギー研究所 半導体装置
TW518637B (en) 1999-04-15 2003-01-21 Semiconductor Energy Lab Electro-optical device and electronic equipment
JP4531194B2 (ja) 1999-04-15 2010-08-25 株式会社半導体エネルギー研究所 電気光学装置及び電子機器
WO2001024265A1 (fr) 1999-09-30 2001-04-05 Rohm, Co., Ltd. Memoire non volatile
JP2001148434A (ja) 1999-10-12 2001-05-29 New Heiro:Kk 不揮発性メモリセルおよびその使用方法、製造方法ならびに不揮発性メモリアレイ
JP2003518742A (ja) 1999-12-21 2003-06-10 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 不揮発性のメモリーセルと周辺部
US20020113268A1 (en) * 2000-02-01 2002-08-22 Jun Koyama Nonvolatile memory, semiconductor device and method of manufacturing the same
US6440870B1 (en) 2000-07-12 2002-08-27 Applied Materials, Inc. Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
US6423644B1 (en) 2000-07-12 2002-07-23 Applied Materials, Inc. Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
JP2002113286A (ja) 2000-10-06 2002-04-16 Matsushita Electric Works Ltd 洗濯機用防水パン
JP4815695B2 (ja) * 2001-05-24 2011-11-16 ソニー株式会社 不揮発性半導体メモリ装置の動作方法
US6759282B2 (en) 2001-06-12 2004-07-06 International Business Machines Corporation Method and structure for buried circuits and devices
KR100487523B1 (ko) 2002-04-15 2005-05-03 삼성전자주식회사 부유트랩형 비휘발성 메모리 소자 및 그 제조방법
US6853035B1 (en) 2002-06-28 2005-02-08 Synopsys, Inc. Negative differential resistance (NDR) memory device with reduced soft error rate
US6730957B1 (en) 2002-11-05 2004-05-04 Winbond Electronics Corporation Non-volatile memory compatible with logic devices and fabrication method thereof
JP2005005516A (ja) * 2003-06-12 2005-01-06 Renesas Technology Corp 半導体装置およびその製造方法
KR101264761B1 (ko) 2004-02-10 2013-05-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 비휘발성 메모리와 그것을 내장하는 ｉｃ 카드, ｉｄ 카드 및 ｉｄ 태그
US7652321B2 (en) 2004-03-08 2010-01-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method of the same
JP4942950B2 (ja) * 2004-05-28 2012-05-30 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7504663B2 (en) 2004-05-28 2009-03-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device with a floating gate electrode that includes a plurality of particles
US7606066B2 (en) * 2005-09-07 2009-10-20 Innovative Silicon Isi Sa Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05145073A (ja) * 1991-11-22 1993-06-11 Seiko Epson Corp 相補型薄膜トランジスタ
JPH1154761A (ja) * 1997-08-01 1999-02-26 Semiconductor Energy Lab Co Ltd 半導体集積回路およびその作製方法
US20030107077A1 (en) * 1997-09-20 2003-06-12 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and manufacturing method thereof
JP2001298100A (ja) * 2000-02-01 2001-10-26 Semiconductor Energy Lab Co Ltd 不揮発性メモリ、半導体装置、およびその作製方法

Also Published As

Publication number Publication date
US8022469B2 (en) 2011-09-20
US7851279B2 (en) 2010-12-14
US20110291173A1 (en) 2011-12-01
US9184173B2 (en) 2015-11-10
US8581332B2 (en) 2013-11-12
JP2014017507A (ja) 2014-01-30
CN101689532B (zh) 2013-06-12
KR20130069885A (ko) 2013-06-26
WO2009004919A1 (en) 2009-01-08
JP2009033141A (ja) 2009-02-12
US20110073934A1 (en) 2011-03-31
KR101404439B1 (ko) 2014-06-10
KR20100047853A (ko) 2010-05-10
US20140035028A1 (en) 2014-02-06
JP5606602B2 (ja) 2014-10-15
US20090001452A1 (en) 2009-01-01
CN101689532A (zh) 2010-03-31

Similar Documents

Publication Publication Date Title
KR101420603B1 (ko) 반도체 장치 및 그 제조 방법
TWI466269B (zh) 非揮發性記憶體
US7875931B2 (en) Semiconductor device with isolation using impurity
US7696562B2 (en) Semiconductor device
US7692232B2 (en) Nonvolatile semiconductor memory device
US20080002454A1 (en) Semiconductor device and electronic device
US8872251B2 (en) Nonvolatile semiconductor memory device and manufacturing method thereof
JP5305620B2 (ja) 不揮発性メモリ
JP2008164794A (ja) 表示装置及び表示システム

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A107 Divisional application of patent
A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0104 Divisional application for international application

St.27 status event code: A-0-1-A10-A18-div-PA0104

St.27 status event code: A-0-1-A10-A16-div-PA0104

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20170616

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20190617

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20210712

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20210712

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000