KR101291917B1 - 금속막의 성막 방법 및 성막 장치 - Google Patents
금속막의 성막 방법 및 성막 장치 Download PDFInfo
- Publication number
- KR101291917B1 KR101291917B1 KR1020087002231A KR20087002231A KR101291917B1 KR 101291917 B1 KR101291917 B1 KR 101291917B1 KR 1020087002231 A KR1020087002231 A KR 1020087002231A KR 20087002231 A KR20087002231 A KR 20087002231A KR 101291917 B1 KR101291917 B1 KR 101291917B1
- Authority
- KR
- South Korea
- Prior art keywords
- film
- recess
- plasma
- metal
- metal film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/04—Coating on selected surface areas, e.g. using masks
- C23C14/046—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3435—Applying energy to the substrate during sputtering
- C23C14/345—Applying energy to the substrate during sputtering using substrate bias
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3471—Introduction of auxiliary energy into the plasma
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76844—Bottomless liners
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Physical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2005-00188107 | 2005-06-28 | ||
| JP2005188107 | 2005-06-28 | ||
| JP2005277044A JP4830421B2 (ja) | 2005-06-28 | 2005-09-26 | 金属膜の成膜方法及び成膜装置 |
| JPJP-P-2005-00277044 | 2005-09-26 | ||
| PCT/JP2006/312890 WO2007001022A1 (ja) | 2005-06-28 | 2006-06-28 | 金属膜の成膜方法及び成膜装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20080022221A KR20080022221A (ko) | 2008-03-10 |
| KR101291917B1 true KR101291917B1 (ko) | 2013-07-31 |
Family
ID=37595271
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020087002231A Expired - Fee Related KR101291917B1 (ko) | 2005-06-28 | 2006-06-28 | 금속막의 성막 방법 및 성막 장치 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8029873B2 (enExample) |
| JP (1) | JP4830421B2 (enExample) |
| KR (1) | KR101291917B1 (enExample) |
| CN (2) | CN101213642B (enExample) |
| TW (1) | TWI430369B (enExample) |
| WO (1) | WO2007001022A1 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5194549B2 (ja) | 2007-04-27 | 2013-05-08 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| TWI419280B (zh) * | 2009-01-16 | 2013-12-11 | Univ Nat Taiwan | 防止金屬遷移的電子封裝件 |
| JP5025679B2 (ja) * | 2009-03-27 | 2012-09-12 | 株式会社東芝 | 半導体装置 |
| JP2011119330A (ja) * | 2009-12-01 | 2011-06-16 | Renesas Electronics Corp | 半導体集積回路装置の製造方法 |
| US8847321B2 (en) * | 2010-03-05 | 2014-09-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Cascode CMOS structure |
| US8252680B2 (en) * | 2010-09-24 | 2012-08-28 | Intel Corporation | Methods and architectures for bottomless interconnect vias |
| US9125333B2 (en) * | 2011-07-15 | 2015-09-01 | Tessera, Inc. | Electrical barrier layers |
| JP5569561B2 (ja) * | 2012-06-18 | 2014-08-13 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| CN103489900B (zh) * | 2013-09-04 | 2016-05-04 | 京东方科技集团股份有限公司 | 一种阻挡层及其制备方法、薄膜晶体管、阵列基板 |
| JP5817856B2 (ja) * | 2014-01-27 | 2015-11-18 | 富士通セミコンダクター株式会社 | 半導体装置 |
| JP6282474B2 (ja) * | 2014-01-31 | 2018-02-21 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US9795038B2 (en) * | 2014-09-25 | 2017-10-17 | Intel Corporation | Electronic package design that facilitates shipping the electronic package |
| JP6472551B2 (ja) * | 2018-01-24 | 2019-02-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP6640391B2 (ja) * | 2019-01-22 | 2020-02-05 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| CN109652761B (zh) * | 2019-01-30 | 2021-01-26 | 惠科股份有限公司 | 镀膜方法及镀膜装置 |
| FI129628B (en) * | 2019-09-25 | 2022-05-31 | Beneq Oy | Method and apparatus for processing surface of a substrate |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980042359A (ko) * | 1996-11-13 | 1998-08-17 | 조셉제이.스위니 | 하부 장착된 원격 플라즈마 시스템을 갖는 기판 처리용 장치 |
| JP2004153162A (ja) * | 2002-10-31 | 2004-05-27 | Fujitsu Ltd | 配線構造の形成方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3846970B2 (ja) * | 1997-04-14 | 2006-11-15 | キヤノンアネルバ株式会社 | イオン化スパッタリング装置 |
| JP2000077365A (ja) | 1998-08-29 | 2000-03-14 | Tokyo Electron Ltd | 研磨スラリー及び研磨方法 |
| JP3540302B2 (ja) * | 2001-10-19 | 2004-07-07 | Necエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US6949461B2 (en) * | 2002-12-11 | 2005-09-27 | International Business Machines Corporation | Method for depositing a metal layer on a semiconductor interconnect structure |
-
2005
- 2005-09-26 JP JP2005277044A patent/JP4830421B2/ja not_active Expired - Fee Related
-
2006
- 2006-06-28 KR KR1020087002231A patent/KR101291917B1/ko not_active Expired - Fee Related
- 2006-06-28 TW TW095123396A patent/TWI430369B/zh not_active IP Right Cessation
- 2006-06-28 CN CN2006800235759A patent/CN101213642B/zh not_active Withdrawn - After Issue
- 2006-06-28 US US11/922,918 patent/US8029873B2/en not_active Expired - Fee Related
- 2006-06-28 WO PCT/JP2006/312890 patent/WO2007001022A1/ja not_active Ceased
- 2006-06-28 CN CN2010102440281A patent/CN101914752B/zh not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980042359A (ko) * | 1996-11-13 | 1998-08-17 | 조셉제이.스위니 | 하부 장착된 원격 플라즈마 시스템을 갖는 기판 처리용 장치 |
| JP2004153162A (ja) * | 2002-10-31 | 2004-05-27 | Fujitsu Ltd | 配線構造の形成方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101213642B (zh) | 2010-09-29 |
| CN101213642A (zh) | 2008-07-02 |
| WO2007001022A1 (ja) | 2007-01-04 |
| CN101914752B (zh) | 2012-07-04 |
| TW200715412A (en) | 2007-04-16 |
| CN101914752A (zh) | 2010-12-15 |
| TWI430369B (zh) | 2014-03-11 |
| JP4830421B2 (ja) | 2011-12-07 |
| JP2007043038A (ja) | 2007-02-15 |
| US20090227104A1 (en) | 2009-09-10 |
| KR20080022221A (ko) | 2008-03-10 |
| US8029873B2 (en) | 2011-10-04 |
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St.27 status event code: A-3-3-V10-V15-crt-PJ1301 Decision date: 20121023 Appeal event data comment text: Appeal Kind Category : Appeal against decision to decline refusal, Appeal Ground Text : 2008 7002231 Appeal request date: 20101124 Appellate body name: Patent Examination Board Decision authority category: Office appeal board Decision identifier: 2010101008971 |
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