KR101155842B1 - 개선된 이중층 포토레지스트 패턴을 제공하는 방법 - Google Patents

개선된 이중층 포토레지스트 패턴을 제공하는 방법 Download PDF

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Publication number
KR101155842B1
KR101155842B1 KR1020117011312A KR20117011312A KR101155842B1 KR 101155842 B1 KR101155842 B1 KR 101155842B1 KR 1020117011312 A KR1020117011312 A KR 1020117011312A KR 20117011312 A KR20117011312 A KR 20117011312A KR 101155842 B1 KR101155842 B1 KR 101155842B1
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KR
South Korea
Prior art keywords
layer
etching
computer instructions
pattern
image layer
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Expired - Fee Related
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KR1020117011312A
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English (en)
Korean (ko)
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KR20110073590A (ko
Inventor
한중 샤오
헬렌 에이치 주
쿼-룽 탕
에스엠 레자 사드자디
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램 리써치 코포레이션
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/405—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their composition, e.g. multilayer masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment

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  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
KR1020117011312A 2003-05-09 2004-04-29 개선된 이중층 포토레지스트 패턴을 제공하는 방법 Expired - Fee Related KR101155842B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/435,130 US7049052B2 (en) 2003-05-09 2003-05-09 Method providing an improved bi-layer photoresist pattern
US10/435,130 2003-05-09
PCT/US2004/013818 WO2004102277A2 (en) 2003-05-09 2004-04-29 Method providing an improved bi-layer photoresist pattern

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
KR1020057021303A Division KR101144019B1 (ko) 2003-05-09 2004-04-29 개선된 이중층 포토레지스트 패턴을 제공하는 방법

Publications (2)

Publication Number Publication Date
KR20110073590A KR20110073590A (ko) 2011-06-29
KR101155842B1 true KR101155842B1 (ko) 2012-06-20

Family

ID=33416877

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1020117011312A Expired - Fee Related KR101155842B1 (ko) 2003-05-09 2004-04-29 개선된 이중층 포토레지스트 패턴을 제공하는 방법
KR1020057021303A Expired - Fee Related KR101144019B1 (ko) 2003-05-09 2004-04-29 개선된 이중층 포토레지스트 패턴을 제공하는 방법

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020057021303A Expired - Fee Related KR101144019B1 (ko) 2003-05-09 2004-04-29 개선된 이중층 포토레지스트 패턴을 제공하는 방법

Country Status (7)

Country Link
US (2) US7049052B2 (https=)
EP (1) EP1623275A2 (https=)
JP (1) JP2007503728A (https=)
KR (2) KR101155842B1 (https=)
CN (1) CN1816777B (https=)
TW (1) TWI348180B (https=)
WO (1) WO2004102277A2 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8048325B2 (en) * 2003-03-31 2011-11-01 Tokyo Electron Limited Method and apparatus for multilayer photoresist dry development
US7785753B2 (en) * 2006-05-17 2010-08-31 Lam Research Corporation Method and apparatus for providing mask in semiconductor processing
JP2008085005A (ja) * 2006-09-27 2008-04-10 Elpida Memory Inc 半導体装置の製造方法
US8283255B2 (en) * 2007-05-24 2012-10-09 Lam Research Corporation In-situ photoresist strip during plasma etching of active hard mask
US20090208865A1 (en) * 2008-02-19 2009-08-20 International Business Machines Corporation Photolithography focus improvement by reduction of autofocus radiation transmission into substrate
KR101570551B1 (ko) 2008-03-11 2015-11-19 램 리써치 코포레이션 에칭층 내에 피쳐들을 에칭하기 위한 방법
KR101355434B1 (ko) 2012-06-12 2014-01-28 한국생산기술연구원 미세 홀이 배열된 폴리머 멤브레인을 포함하는 플라스틱 챔버 플레이트의 제작 방법
US9911620B2 (en) * 2015-02-23 2018-03-06 Lam Research Corporation Method for achieving ultra-high selectivity while etching silicon nitride
CN109153690A (zh) * 2016-05-03 2019-01-04 美国陶氏有机硅公司 倍半硅氧烷树脂和甲硅烷基酐组合物
WO2017192345A1 (en) 2016-05-03 2017-11-09 Dow Corning Corporation Silsesquioxane resin and oxaamine composition
US10643858B2 (en) 2017-10-11 2020-05-05 Samsung Electronics Co., Ltd. Method of etching substrate

Citations (3)

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JPH02172223A (ja) * 1988-12-26 1990-07-03 Hitachi Ltd プラズマエッチング装置
US20020066535A1 (en) * 1995-07-10 2002-06-06 William Brown Exhaust system for treating process gas effluent
EP1324374A2 (en) * 2001-12-04 2003-07-02 Anelva Corporation Etching System for an insulation-film

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US5041361A (en) 1988-08-08 1991-08-20 Midwest Research Institute Oxygen ion-beam microlithography
US5277749A (en) * 1991-10-17 1994-01-11 International Business Machines Corporation Methods and apparatus for relieving stress and resisting stencil delamination when performing lift-off processes that utilize high stress metals and/or multiple evaporation steps
JP2547944B2 (ja) * 1992-09-30 1996-10-30 インターナショナル・ビジネス・マシーンズ・コーポレイション 二層レジスト組成物を使用する光学リソグラフによりサブ−ハーフミクロンパターンを形成する方法
DE19504434C1 (de) 1995-02-10 1996-05-15 Siemens Ag Verfahren zur Herstellung siliziumhaltiger Masken
US5726102A (en) * 1996-06-10 1998-03-10 Vanguard International Semiconductor Corporation Method for controlling etch bias in plasma etch patterning of integrated circuit layers
KR100249172B1 (ko) * 1996-10-24 2000-03-15 김영환 감광막 식각방법
US5985524A (en) * 1997-03-28 1999-11-16 International Business Machines Incorporated Process for using bilayer photoresist
EP0911697A3 (en) 1997-10-22 1999-09-15 Interuniversitair Microelektronica Centrum Vzw A fluorinated hard mask for micropatterning of polymers
JP2000305273A (ja) * 1998-11-19 2000-11-02 Applied Materials Inc 遠紫外線ドライフォトリソグラフィー
US20010004510A1 (en) * 1998-12-15 2001-06-21 Wheeler David R. Refractory bilayer resist materials for lithography using highly attenuated radiation
EP1033744A3 (en) * 1999-02-26 2009-07-15 Applied Materials, Inc. Improved dry photolithography process for deep ultraviolet exposure
US6153530A (en) * 1999-03-16 2000-11-28 Applied Materials, Inc. Post-etch treatment of plasma-etched feature surfaces to prevent corrosion
DE19919036C1 (de) 1999-04-27 2001-01-11 Bosch Gmbh Robert Ätzmaske und Verfahren zu deren Herstellung
US6344105B1 (en) * 1999-06-30 2002-02-05 Lam Research Corporation Techniques for improving etch rate uniformity
US20010024769A1 (en) * 2000-02-08 2001-09-27 Kevin Donoghue Method for removing photoresist and residues from semiconductor device surfaces
KR100520188B1 (ko) * 2000-02-18 2005-10-10 주식회사 하이닉스반도체 부분적으로 가교화된 2층 포토레지스트용 중합체
US6495311B1 (en) * 2000-03-17 2002-12-17 International Business Machines Corporation Bilayer liftoff process for high moment laminate
JP3403374B2 (ja) * 2000-05-26 2003-05-06 松下電器産業株式会社 有機膜のエッチング方法、半導体装置の製造方法及びパターンの形成方法
US6893969B2 (en) * 2001-02-12 2005-05-17 Lam Research Corporation Use of ammonia for etching organic low-k dielectrics
US6541361B2 (en) * 2001-06-27 2003-04-01 Lam Research Corp. Plasma enhanced method for increasing silicon-containing photoresist selectivity
US6551938B1 (en) * 2002-01-25 2003-04-22 Taiwon Semiconductor Manufacturing Company N2/H2 chemistry for dry development in top surface imaging technology
US6716570B2 (en) * 2002-05-23 2004-04-06 Institute Of Microelectronics Low temperature resist trimming process
KR100989107B1 (ko) * 2003-03-31 2010-10-25 인터내셔널 비지니스 머신즈 코포레이션 다층 포토레지스트 건식 현상을 위한 방법 및 장치
US7226706B2 (en) * 2003-05-20 2007-06-05 Taiwan Semiconductor Manufacturing Company Modification of mask blank to avoid charging effect

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02172223A (ja) * 1988-12-26 1990-07-03 Hitachi Ltd プラズマエッチング装置
US20020066535A1 (en) * 1995-07-10 2002-06-06 William Brown Exhaust system for treating process gas effluent
EP1324374A2 (en) * 2001-12-04 2003-07-02 Anelva Corporation Etching System for an insulation-film

Also Published As

Publication number Publication date
US20060166145A1 (en) 2006-07-27
KR101144019B1 (ko) 2012-05-11
EP1623275A2 (en) 2006-02-08
KR20060020621A (ko) 2006-03-06
WO2004102277A3 (en) 2004-12-29
JP2007503728A (ja) 2007-02-22
CN1816777B (zh) 2011-06-08
KR20110073590A (ko) 2011-06-29
WO2004102277B1 (en) 2005-03-03
TWI348180B (en) 2011-09-01
US7049052B2 (en) 2006-05-23
CN1816777A (zh) 2006-08-09
US20040224264A1 (en) 2004-11-11
WO2004102277A2 (en) 2004-11-25
TW200504830A (en) 2005-02-01

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