KR101149134B1 - 개별 변형된 n-채널 및 p-채널 트랜지스터 - Google Patents

개별 변형된 n-채널 및 p-채널 트랜지스터 Download PDF

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KR101149134B1
KR101149134B1 KR1020067027473A KR20067027473A KR101149134B1 KR 101149134 B1 KR101149134 B1 KR 101149134B1 KR 1020067027473 A KR1020067027473 A KR 1020067027473A KR 20067027473 A KR20067027473 A KR 20067027473A KR 101149134 B1 KR101149134 B1 KR 101149134B1
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layer
wafer
bonding
transistors
conductivity type
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Korean (ko)
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KR20070022809A (ko
Inventor
스콧 케이. 포즈더
샐리 엠. 셀리크
병 더블유. 민
반스 에이치. 아담스
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프리스케일 세미컨덕터, 인크.
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30Devices controlled by electric currents or voltages
    • H10D48/32Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H10D48/34Bipolar devices
    • H10D48/345Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00Three-dimensional [3D] integrated devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components
    • HELECTRICITY
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    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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    • H01ELECTRIC ELEMENTS
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    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049Nitrides composed of metals from groups of the periodic table
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    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
KR1020067027473A 2004-05-28 2005-04-26 개별 변형된 n-채널 및 p-채널 트랜지스터 Expired - Fee Related KR101149134B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/856,581 US7041576B2 (en) 2004-05-28 2004-05-28 Separately strained N-channel and P-channel transistors
US10/856,581 2004-05-28
PCT/US2005/014325 WO2005119746A1 (en) 2004-05-28 2005-04-26 Separately strained n-channel and p-channel transistors

Publications (2)

Publication Number Publication Date
KR20070022809A KR20070022809A (ko) 2007-02-27
KR101149134B1 true KR101149134B1 (ko) 2012-05-29

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KR1020067027473A Expired - Fee Related KR101149134B1 (ko) 2004-05-28 2005-04-26 개별 변형된 n-채널 및 p-채널 트랜지스터

Country Status (7)

Country Link
US (1) US7041576B2 (enExample)
EP (1) EP1749311A4 (enExample)
JP (1) JP4744514B2 (enExample)
KR (1) KR101149134B1 (enExample)
CN (1) CN100508130C (enExample)
TW (1) TWI416702B (enExample)
WO (1) WO2005119746A1 (enExample)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7514767B2 (en) * 2003-12-03 2009-04-07 Advanced Chip Engineering Technology Inc. Fan out type wafer level package structure and method of the same
US7459781B2 (en) * 2003-12-03 2008-12-02 Wen-Kun Yang Fan out type wafer level package structure and method of the same
US7348658B2 (en) * 2004-08-30 2008-03-25 International Business Machines Corporation Multilayer silicon over insulator device
US8013342B2 (en) 2007-11-14 2011-09-06 International Business Machines Corporation Double-sided integrated circuit chips
US7670927B2 (en) * 2006-05-16 2010-03-02 International Business Machines Corporation Double-sided integrated circuit chips
KR100789570B1 (ko) * 2006-08-23 2007-12-28 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조방법
US7485508B2 (en) * 2007-01-26 2009-02-03 International Business Machines Corporation Two-sided semiconductor-on-insulator structures and methods of manufacturing the same
US7800150B2 (en) * 2007-05-29 2010-09-21 United Microelectronics Corp. Semiconductor device
US8288756B2 (en) * 2007-11-30 2012-10-16 Advanced Micro Devices, Inc. Hetero-structured, inverted-T field effect transistor
US20090289280A1 (en) * 2008-05-22 2009-11-26 Da Zhang Method for Making Transistors and the Device Thereof
US8003454B2 (en) * 2008-05-22 2011-08-23 Freescale Semiconductor, Inc. CMOS process with optimized PMOS and NMOS transistor devices
US8193559B2 (en) * 2009-01-27 2012-06-05 Infineon Technologies Austria Ag Monolithic semiconductor switches and method for manufacturing
TWI478319B (zh) * 2010-07-20 2015-03-21 晶元光電股份有限公司 整合式發光裝置及其製造方法
DE102010045055B4 (de) * 2010-09-10 2019-03-28 Austriamicrosystems Ag Verfahren zur Herstellung eines Halbleiterbauelementes mit einer Durchkontaktierung
US8421193B2 (en) * 2010-11-18 2013-04-16 Nanya Technology Corporation Integrated circuit device having through via and method for preparing the same
US9947688B2 (en) * 2011-06-22 2018-04-17 Psemi Corporation Integrated circuits with components on both sides of a selected substrate and methods of fabrication
US8664756B2 (en) 2012-07-24 2014-03-04 Medtronic, Inc. Reconstituted wafer package with high voltage discrete active dice and integrated field plate for high temperature leakage current stability
US8803292B2 (en) 2012-04-27 2014-08-12 Taiwan Semiconductor Manufacturing Company, Ltd. Through-substrate vias and methods for forming the same
US8624324B1 (en) 2012-08-10 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Connecting through vias to devices
US10128269B2 (en) 2013-11-08 2018-11-13 Taiwan Semiconductor Manufacturing Company, Ltd. Systems and methods for a semiconductor structure having multiple semiconductor-device layers
US10163897B2 (en) * 2013-11-15 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Inter-level connection for multi-layer structures
KR102530338B1 (ko) * 2016-12-15 2023-05-08 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US11869890B2 (en) * 2017-12-26 2024-01-09 Intel Corporation Stacked transistors with contact last
US11430814B2 (en) 2018-03-05 2022-08-30 Intel Corporation Metallization structures for stacked device connectivity and their methods of fabrication
KR102746120B1 (ko) 2019-03-11 2024-12-23 삼성전자주식회사 반도체 장치 및 그 제조 방법
US11158738B2 (en) * 2019-06-18 2021-10-26 Samsung Electronics Co., Ltd Method of forming isolation dielectrics for stacked field effect transistors (FETs)
WO2022201497A1 (ja) * 2021-03-26 2022-09-29 昭和電工マテリアルズ株式会社 半導体装置の製造方法、半導体装置、集積回路要素、及び、集積回路要素の製造方法
US12431469B2 (en) * 2022-02-11 2025-09-30 International Business Machines Corporation Vertically stacked FET with strained channel

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5872393A (en) 1995-10-30 1999-02-16 Matsushita Electric Industrial Co., Ltd. RF semiconductor device and a method for manufacturing the same
US6500694B1 (en) 2000-03-22 2002-12-31 Ziptronix, Inc. Three dimensional device integration method and integrated device
US20030231967A1 (en) 2002-05-13 2003-12-18 Khalil Najafi Micropump assembly for a microgas chromatograph and the like

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6052052A (ja) * 1983-08-31 1985-03-23 Fujitsu Ltd 相補型mis半導体装置
JPS60154549A (ja) * 1984-01-24 1985-08-14 Fujitsu Ltd 半導体装置の製造方法
JPS63126262A (ja) * 1986-11-14 1988-05-30 Sharp Corp 三次元半導体集積回路の製造方法
JPH02263465A (ja) * 1988-11-05 1990-10-26 Mitsubishi Electric Corp 積層型半導体装置およびその製造方法
JP3048686B2 (ja) * 1991-07-22 2000-06-05 日本電気株式会社 半導体装置およびその製造方法
JPH0714982A (ja) * 1993-06-21 1995-01-17 Hitachi Ltd 半導体集積回路装置及びその製造方法
US5534713A (en) 1994-05-20 1996-07-09 International Business Machines Corporation Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers
US5936280A (en) * 1997-04-21 1999-08-10 Advanced Micro Devices, Inc. Multilayer quadruple gate field effect transistor structure for use in integrated circuit devices
US5906951A (en) 1997-04-30 1999-05-25 International Business Machines Corporation Strained Si/SiGe layers on insulator
US5818069A (en) 1997-06-20 1998-10-06 Advanced Micro Devices, Inc. Ultra high density series-connected transistors formed on separate elevational levels
JP4032454B2 (ja) * 1997-06-27 2008-01-16 ソニー株式会社 三次元回路素子の製造方法
JP2000277715A (ja) * 1999-03-25 2000-10-06 Matsushita Electric Ind Co Ltd 半導体基板,その製造方法及び半導体装置
US6984571B1 (en) * 1999-10-01 2006-01-10 Ziptronix, Inc. Three dimensional device integration method and integrated device
TWI239051B (en) * 2002-09-04 2005-09-01 Penn State Res Found Method for preparing a removable system on a mother substrate, method for preparing a sacrificial release layer on a mother substrate, and systems prepared thereby

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5872393A (en) 1995-10-30 1999-02-16 Matsushita Electric Industrial Co., Ltd. RF semiconductor device and a method for manufacturing the same
US6500694B1 (en) 2000-03-22 2002-12-31 Ziptronix, Inc. Three dimensional device integration method and integrated device
US20030231967A1 (en) 2002-05-13 2003-12-18 Khalil Najafi Micropump assembly for a microgas chromatograph and the like

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Publication number Publication date
CN100508130C (zh) 2009-07-01
US7041576B2 (en) 2006-05-09
EP1749311A1 (en) 2007-02-07
TW200614489A (en) 2006-05-01
US20050275017A1 (en) 2005-12-15
JP2008501239A (ja) 2008-01-17
TWI416702B (zh) 2013-11-21
CN1954410A (zh) 2007-04-25
JP4744514B2 (ja) 2011-08-10
KR20070022809A (ko) 2007-02-27
EP1749311A4 (en) 2010-01-13
WO2005119746A1 (en) 2005-12-15

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