KR101116321B1 - 기판 정렬 방법 - Google Patents

기판 정렬 방법 Download PDF

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Publication number
KR101116321B1
KR101116321B1 KR1020090077639A KR20090077639A KR101116321B1 KR 101116321 B1 KR101116321 B1 KR 101116321B1 KR 1020090077639 A KR1020090077639 A KR 1020090077639A KR 20090077639 A KR20090077639 A KR 20090077639A KR 101116321 B1 KR101116321 B1 KR 101116321B1
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KR
South Korea
Prior art keywords
identified
substrate
alignment mark
alignment
marks
Prior art date
Application number
KR1020090077639A
Other languages
English (en)
Korean (ko)
Other versions
KR20110019990A (ko
Inventor
오승훈
노성화
박현극
안치홍
Original Assignee
에이피시스템 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 에이피시스템 주식회사 filed Critical 에이피시스템 주식회사
Priority to KR1020090077639A priority Critical patent/KR101116321B1/ko
Priority to CN2010102595920A priority patent/CN101996918B/zh
Priority to TW099127944A priority patent/TWI447841B/zh
Publication of KR20110019990A publication Critical patent/KR20110019990A/ko
Application granted granted Critical
Publication of KR101116321B1 publication Critical patent/KR101116321B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67282—Marking devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y10S414/136—Associated with semiconductor wafer handling including wafer orienting means

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
KR1020090077639A 2009-08-21 2009-08-21 기판 정렬 방법 KR101116321B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020090077639A KR101116321B1 (ko) 2009-08-21 2009-08-21 기판 정렬 방법
CN2010102595920A CN101996918B (zh) 2009-08-21 2010-08-19 对准衬底的方法
TW099127944A TWI447841B (zh) 2009-08-21 2010-08-20 對準基板的方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020090077639A KR101116321B1 (ko) 2009-08-21 2009-08-21 기판 정렬 방법

Publications (2)

Publication Number Publication Date
KR20110019990A KR20110019990A (ko) 2011-03-02
KR101116321B1 true KR101116321B1 (ko) 2012-03-09

Family

ID=43786858

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020090077639A KR101116321B1 (ko) 2009-08-21 2009-08-21 기판 정렬 방법

Country Status (3)

Country Link
KR (1) KR101116321B1 (zh)
CN (1) CN101996918B (zh)
TW (1) TWI447841B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11544954B2 (en) 2019-02-13 2023-01-03 Samsung Display Co., Ltd. Device and method for bonding sensor to display panel

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101326107B1 (ko) * 2011-12-20 2013-11-06 삼성디스플레이 주식회사 레이저 가공장치 및 그 제어방법
CN108493147B (zh) * 2018-03-28 2020-08-04 京东方科技集团股份有限公司 一种基板及其对位方法
CN113096569A (zh) * 2020-01-09 2021-07-09 北京小米移动软件有限公司 校准检测方法及装置、校准方法、显示屏装置及移动终端
CN114200787B (zh) * 2021-12-31 2023-09-15 中山新诺科技股份有限公司 一种提高数字化激光直写曝光机分区对位效率的方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030013267A1 (en) 2000-08-01 2003-01-16 Marini Edward J. Shot averaging for fine pattern alignment with minimal throughput loss
KR100614796B1 (ko) 2004-12-20 2006-08-22 삼성전자주식회사 기판 정렬 방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1468892A (en) * 1973-06-15 1977-03-30 Westinghouse Electric Corp Method and apparatus for electron beam alignment with a substrate
DE19839999C1 (de) * 1998-09-02 2000-05-04 Siemens Ag Verfahren und Vorrichtung zum Kalibrieren eines Verfahrwegs und/oder einer Winkellage einer Haltevorrichtung in einer Einrichtung zur Herstellung von elektrischen Baugruppen sowie Kalibriersubstrat
KR20030000775A (ko) * 2001-06-27 2003-01-06 삼성전자 주식회사 포토설비의 웨이퍼 정렬방법
JP4023262B2 (ja) * 2002-09-02 2007-12-19 ソニー株式会社 アライメント方法、露光方法、露光装置およびマスクの製造方法
JP2004282017A (ja) * 2002-09-20 2004-10-07 Asml Netherlands Bv リソグラフィ装置の位置決めシステムおよび方法
JP4168344B2 (ja) * 2004-09-27 2008-10-22 セイコーエプソン株式会社 露光マスクの位置合わせ方法、及び薄膜素子基板の製造方法
NL1034086C2 (nl) * 2007-07-03 2009-01-06 Assembleon Bv Werkwijze voor het plaatsen van ten minste een van aansluitpunten voorziene component op een substraat alsmede een dergelijke inrichting.
US7837907B2 (en) * 2007-07-20 2010-11-23 Molecular Imprints, Inc. Alignment system and method for a substrate in a nano-imprint process

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030013267A1 (en) 2000-08-01 2003-01-16 Marini Edward J. Shot averaging for fine pattern alignment with minimal throughput loss
KR100614796B1 (ko) 2004-12-20 2006-08-22 삼성전자주식회사 기판 정렬 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11544954B2 (en) 2019-02-13 2023-01-03 Samsung Display Co., Ltd. Device and method for bonding sensor to display panel

Also Published As

Publication number Publication date
TW201108348A (en) 2011-03-01
CN101996918A (zh) 2011-03-30
CN101996918B (zh) 2013-03-27
TWI447841B (zh) 2014-08-01
KR20110019990A (ko) 2011-03-02

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