KR100842976B1 - 반도체장치 - Google Patents
반도체장치 Download PDFInfo
- Publication number
- KR100842976B1 KR100842976B1 KR1020010072882A KR20010072882A KR100842976B1 KR 100842976 B1 KR100842976 B1 KR 100842976B1 KR 1020010072882 A KR1020010072882 A KR 1020010072882A KR 20010072882 A KR20010072882 A KR 20010072882A KR 100842976 B1 KR100842976 B1 KR 100842976B1
- Authority
- KR
- South Korea
- Prior art keywords
- wiring
- film
- bump
- solder
- film thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/44—Conductive materials thereof
- H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
- H10W20/4421—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W42/25—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons against alpha rays, e.g. for outer space applications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07234—Using a reflow oven
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000365486A JP4068801B2 (ja) | 2000-11-30 | 2000-11-30 | 半導体装置 |
| JPJP-P-2000-00365486 | 2000-11-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20020042430A KR20020042430A (ko) | 2002-06-05 |
| KR100842976B1 true KR100842976B1 (ko) | 2008-07-01 |
Family
ID=18836249
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020010072882A Expired - Fee Related KR100842976B1 (ko) | 2000-11-30 | 2001-11-22 | 반도체장치 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6661093B2 (https=) |
| JP (1) | JP4068801B2 (https=) |
| KR (1) | KR100842976B1 (https=) |
| TW (1) | TW550767B (https=) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6854636B2 (en) * | 2002-12-06 | 2005-02-15 | International Business Machines Corporation | Structure and method for lead free solder electronic package interconnections |
| DE10308275A1 (de) * | 2003-02-26 | 2004-09-16 | Advanced Micro Devices, Inc., Sunnyvale | Strahlungsresistentes Halbleiterbauteil |
| JP2005211946A (ja) * | 2004-01-30 | 2005-08-11 | Renesas Technology Corp | 半田合金および半導体装置 |
| TWI233170B (en) * | 2004-02-05 | 2005-05-21 | United Microelectronics Corp | Ultra-thin wafer level stack packaging method and structure using thereof |
| JP3880600B2 (ja) * | 2004-02-10 | 2007-02-14 | 松下電器産業株式会社 | 半導体装置およびその製造方法 |
| TWI254428B (en) * | 2004-11-24 | 2006-05-01 | Advanced Chip Eng Tech Inc | FCBGA package structure |
| US7468545B2 (en) * | 2005-05-06 | 2008-12-23 | Megica Corporation | Post passivation structure for a semiconductor device and packaging process for same |
| JP5000877B2 (ja) * | 2005-10-07 | 2012-08-15 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7381635B2 (en) * | 2005-07-18 | 2008-06-03 | International Business Machines Corporation | Method and structure for reduction of soft error rates in integrated circuits |
| US20070176292A1 (en) * | 2006-01-27 | 2007-08-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bonding pad structure |
| US7386817B1 (en) | 2007-01-02 | 2008-06-10 | International Business Machines Corporation | Method of determining stopping powers of design structures with respect to a traveling particle |
| WO2009013826A1 (ja) * | 2007-07-25 | 2009-01-29 | Fujitsu Microelectronics Limited | 半導体装置 |
| ATE541310T1 (de) | 2007-10-09 | 2012-01-15 | Fujitsu Ltd | Integriertes halbleiterschaltungsbauelement |
| JP4850852B2 (ja) * | 2008-01-09 | 2012-01-11 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| US8261229B2 (en) * | 2010-01-29 | 2012-09-04 | Xilinx, Inc. | Method and apparatus for interconnect layout in an integrated circuit |
| US10109609B2 (en) | 2014-01-13 | 2018-10-23 | Infineon Technologies Austria Ag | Connection structure and electronic component |
| JP5590260B1 (ja) * | 2014-02-04 | 2014-09-17 | 千住金属工業株式会社 | Agボール、Ag核ボール、フラックスコートAgボール、フラックスコートAg核ボール、はんだ継手、フォームはんだ、はんだペースト、Agペースト及びAg核ペースト |
| JP5534122B1 (ja) * | 2014-02-04 | 2014-06-25 | 千住金属工業株式会社 | 核ボール、はんだペースト、フォームはんだ、フラックスコート核ボールおよびはんだ継手 |
| JP6522980B2 (ja) | 2015-02-18 | 2019-05-29 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| KR102454892B1 (ko) | 2015-12-09 | 2022-10-14 | 삼성전자주식회사 | 반도체 칩, 이를 포함하는 반도체 패키지, 및 반도체 칩의 제조 방법 |
| US20190006342A1 (en) * | 2017-06-30 | 2019-01-03 | Intel Corporation | Rigid adhesive package-on-package semiconductors |
| US10580783B2 (en) | 2018-03-01 | 2020-03-03 | Sandisk Technologies Llc | Multi-tier three-dimensional memory device containing differential etch rate field oxides and method of making the same |
| JP2020047714A (ja) * | 2018-09-18 | 2020-03-26 | キオクシア株式会社 | 半導体メモリおよびその製造方法 |
| JP7179587B2 (ja) * | 2018-11-12 | 2022-11-29 | 株式会社東芝 | 半導体装置 |
| JP2020155596A (ja) | 2019-03-20 | 2020-09-24 | キオクシア株式会社 | 半導体装置 |
| JP2022083468A (ja) * | 2020-11-25 | 2022-06-06 | ソニーグループ株式会社 | 半導体装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11111885A (ja) * | 1997-10-07 | 1999-04-23 | Sony Corp | 半導体装置およびその製造方法 |
| US6111317A (en) * | 1996-01-18 | 2000-08-29 | Kabushiki Kaisha Toshiba | Flip-chip connection type semiconductor integrated circuit device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6022792A (en) * | 1996-03-13 | 2000-02-08 | Seiko Instruments, Inc. | Semiconductor dicing and assembling method |
| JP3768817B2 (ja) | 1997-10-30 | 2006-04-19 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
-
2000
- 2000-11-30 JP JP2000365486A patent/JP4068801B2/ja not_active Expired - Fee Related
-
2001
- 2001-11-06 TW TW090127568A patent/TW550767B/zh not_active IP Right Cessation
- 2001-11-20 US US09/988,684 patent/US6661093B2/en not_active Expired - Lifetime
- 2001-11-22 KR KR1020010072882A patent/KR100842976B1/ko not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6111317A (en) * | 1996-01-18 | 2000-08-29 | Kabushiki Kaisha Toshiba | Flip-chip connection type semiconductor integrated circuit device |
| JPH11111885A (ja) * | 1997-10-07 | 1999-04-23 | Sony Corp | 半導体装置およびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| TW550767B (en) | 2003-09-01 |
| KR20020042430A (ko) | 2002-06-05 |
| JP4068801B2 (ja) | 2008-03-26 |
| US20020074656A1 (en) | 2002-06-20 |
| US6661093B2 (en) | 2003-12-09 |
| JP2002170826A (ja) | 2002-06-14 |
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