KR100834739B1 - 반도체 소자 및 그 제조 방법 - Google Patents
반도체 소자 및 그 제조 방법 Download PDFInfo
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- KR100834739B1 KR100834739B1 KR1020060089133A KR20060089133A KR100834739B1 KR 100834739 B1 KR100834739 B1 KR 100834739B1 KR 1020060089133 A KR1020060089133 A KR 1020060089133A KR 20060089133 A KR20060089133 A KR 20060089133A KR 100834739 B1 KR100834739 B1 KR 100834739B1
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- insulating film
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- interlayer insulating
- bit line
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 38
- 238000000034 method Methods 0.000 title claims description 35
- 239000011229 interlayer Substances 0.000 claims abstract description 67
- 125000006850 spacer group Chemical group 0.000 claims abstract description 49
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 239000010410 layer Substances 0.000 claims description 107
- 238000005530 etching Methods 0.000 claims description 20
- 239000012535 impurity Substances 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 150000004767 nitrides Chemical class 0.000 claims description 11
- 239000004020 conductor Substances 0.000 claims description 10
- 230000004888 barrier function Effects 0.000 claims description 9
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 9
- 239000005388 borosilicate glass Substances 0.000 claims description 7
- 239000005360 phosphosilicate glass Substances 0.000 claims description 7
- 238000010030 laminating Methods 0.000 claims 1
- 238000003860 storage Methods 0.000 description 42
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- 238000001039 wet etching Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 239000007769 metal material Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910021529 ammonia Inorganic materials 0.000 description 3
- 239000008367 deionised water Substances 0.000 description 3
- 229910021641 deionized water Inorganic materials 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000011259 mixed solution Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 229910004200 TaSiN Inorganic materials 0.000 description 1
- 229910008482 TiSiN Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- QRXWMOHMRWLFEY-UHFFFAOYSA-N isoniazide Chemical compound NNC(=O)C1=CC=NC=C1 QRXWMOHMRWLFEY-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/482—Bit lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/485—Bit line contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (20)
- 반도체 기판 상의 제 1 층간 절연막 내에 형성된 콘택 패드;상기 제 1 층간 절연막 상의 제 2 층간 절연막에 형성되어 상기 콘택 패드를 노출시키며, 하부에 상기 콘택 패드 표면을 완전히 노출시키는 돌출부가 형성된 콘택 홀;상기 돌출부를 채우며 상기 콘택 홀 내벽에 형성된 콘택 스페이서; 및내벽에 상기 콘택 스페이서가 형성된 상기 콘택 홀 내에 매립된 콘택 플러그를 포함하는 반도체 소자.
- 제 1 항에 있어서,상기 제 2 층간 절연막은 제 1 절연막 및 제 2 절연막이 순차적으로 적층된 반도체 소자.
- 제 2 항에 있어서,상기 돌출부는 상기 제 1 절연막에 형성된 반도체 소자.
- 제 3 항에 있어서,상기 제 1 절연막은 상기 제 2 절연막보다 작은 두께를 갖는 반도체 소자.
- 제 2 항에 있어서,상기 제 1 절연막과 상기 제 2 절연막은 식각율이 서로 다른 막으로 형성된 반도체 소자.
- 제 5 항에 있어서,상기 제 1 및 제 2 절연막은 불순물이 도핑된 절연막으로서, 상기 제 1 절연막 내의 불순물 농도가 상기 제 2 절연막 내의 불순물 농도보다 높게 형성된 반도체 소자.
- 제 6 항에 있어서,상기 제 1 또는 제 2 절연막은 BSG(BoroSilicate Glass)막, PSG(PhosphoSilicate Glass)막 및 BPSG(BoroPhosphoSilicate Glass)막 중 선택된 어느 하나의 막인 반도체 소자.
- 제 1 항에 있어서,상기 콘택 플러그는 금속 배리어막 및 금속막이 적층된 반도체 소자.
- 제 1 항에 있어서,상기 콘택 스페이서는 질화막으로 형성된 반도체 소자.
- 제 1 항에 있어서,상기 콘택 패드 상부의 외벽을 둘러싸는 외부 스페이서를 더 포함하는 반도체 소자.
- 반도체 기판 상의 제 1 층간 절연막 내에 콘택 패드를 형성하고,상기 제 1 층간 절연막 상에 제 2 층간 절연막을 형성하고,상기 제 2 층간 절연막에 상기 콘택 패드를 노출시키며, 하부에 상기 콘택 패드 표면을 완전히 노출시키는 돌출부가 형성된 콘택 홀을 형성하고,상기 콘택 홀의 내벽에 상기 돌출부를 채우는 콘택 스페이서를 형성하고,내벽에 상기 콘택 스페이서가 형성된 상기 콘택 홀 내에 도전 물질을 매립하여 콘택 플러그를 형성하는 것을 포함하는 반도체 소자 제조 방법.
- 제 11 항에 있어서,상기 제 2 층간 절연막은 제 1 절연막 및 제 2 절연막을 순차적으로 적층하여 형성하는 반도체 소자 제조 방법.
- 제 12 항에 있어서,상기 제 1 절연막과 상기 제 2 절연막은 식각율이 서로 다른 막으로 형성되는 반도체 소자 제조 방법.
- 제 13 항에 있어서,상기 제 1 및 제 2 절연막은 불순물이 도핑된 절연막으로 형성하되, 상기 제 1 절연막 내의 불순물 농도가 상기 제 2 절연막 내의 불순물 농도보다 높게 형성하는 반도체 소자 제조 방법.
- 제 14 항에 있어서,상기 제 1 또는 제 2 절연막은 BSG(BoroSilicate Glass)막, PSG(PhosphoSilicate Glass)막 및 BPSG(BoroPhosphoSilicate Glass)막 중 선택된 어느 하나의 막으로 형성하는 반도체 소자 제조 방법.
- 제 12 항에 있어서,상기 제 1 절연막은 상기 제 2 절연막보다 작은 두께로 형성하는 반도체 소자 제조 방법.
- 제 16 항에 있어서,상기 돌출부는 상기 제 1 절연막에 형성하는 반도체 소자 제조 방법.
- 제 11 항에 있어서,상기 콘택 스페이서는 질화막으로 형성하는 반도체 소자 제조 방법.
- 제 11 항에 있어서,상기 콘택 플러그를 형성하는 것은 금속 배리어막 및 금속막을 적층하여 형 성하는 반도체 소자 제조 방법.
- 제 11 항에 있어서,상기 콘택 패드를 형성한 후, 상기 콘택 패드 상부의 외벽을 둘러싸는 외부 스페이서를 형성하는 것을 더 포함하는 반도체 소자 제조 방법.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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KR1020060089133A KR100834739B1 (ko) | 2006-09-14 | 2006-09-14 | 반도체 소자 및 그 제조 방법 |
US11/850,208 US8026604B2 (en) | 2006-09-14 | 2007-09-05 | Semiconductor devices having contact holes including protrusions exposing contact pads |
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KR1020060089133A KR100834739B1 (ko) | 2006-09-14 | 2006-09-14 | 반도체 소자 및 그 제조 방법 |
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KR20080024702A KR20080024702A (ko) | 2008-03-19 |
KR100834739B1 true KR100834739B1 (ko) | 2008-06-05 |
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Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2009152361A (ja) * | 2007-12-20 | 2009-07-09 | Toshiba Corp | 半導体装置およびその製造方法 |
KR101888964B1 (ko) * | 2011-08-29 | 2018-08-17 | 에스케이하이닉스 주식회사 | 다마신비트라인을 구비한 반도체장치 및 그 제조 방법 |
KR102001417B1 (ko) * | 2012-10-23 | 2019-07-19 | 삼성전자주식회사 | 반도체 장치 |
US9887262B2 (en) * | 2015-02-23 | 2018-02-06 | Toshiba Memory Corporation | Semiconductor device |
TWI636491B (zh) * | 2015-04-20 | 2018-09-21 | 華邦電子股份有限公司 | 記憶元件及其製造方法 |
US9911693B2 (en) * | 2015-08-28 | 2018-03-06 | Micron Technology, Inc. | Semiconductor devices including conductive lines and methods of forming the semiconductor devices |
US10818729B2 (en) * | 2018-05-17 | 2020-10-27 | Macronix International Co., Ltd. | Bit cost scalable 3D phase change cross-point memory |
CN117177552A (zh) * | 2022-05-23 | 2023-12-05 | 长鑫存储技术有限公司 | 半导体结构及其制备方法 |
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